当前位置: X-MOL 学术Int. J. Parallel. Program › 论文详情
Our official English website, www.x-mol.net, welcomes your feedback! (Note: you will need to create a separate account there.)
i DocChip: A Configurable Hardware Architecture for Historical Document Image Processing
International Journal of Parallel Programming ( IF 0.9 ) Pub Date : 2021-01-30 , DOI: 10.1007/s10766-020-00690-y
Menbere Kina Tekleyohannes , Vladimir Rybalkin , Muhammad Mohsin Ghaffar , Javier Alejandro Varela , Norbert Wehn , Andreas Dengel

In recent years, \(\hbox {optical character recognition (OCR)}\) systems have been used to digitally preserve historical archives. To transcribe historical archives into a machine-readable form, first, the documents are scanned, then an \(\hbox {OCR}\) is applied. In order to digitize documents without the need to remove them from where they are archived, it is valuable to have a portable device that combines scanning and \(\hbox {OCR}\) capabilities. Nowadays, there exist many commercial and open-source document digitization techniques, which are optimized for contemporary documents. However, they fail to give sufficient text recognition accuracy for transcribing historical documents due to the severe quality degradation of such documents. On the contrary, the anyOCR system, which is designed to mainly digitize historical documents, provides high accuracy. However, this comes at a cost of high computational complexity resulting in long runtime and high power consumption. To tackle these challenges, we propose a low power energy-efficient accelerator with real-time capabilities called iDocChip, which is a configurable hybrid hardware-software programmable \(\hbox {System-on-Chip (SoC)}\) based on anyOCR for digitizing historical documents. In this paper, we focus on one of the most crucial processing steps in the anyOCR system: Text and Image Segmentation, which makes use of a multi-resolution morphology-based algorithm. Moreover, an optimized \(\hbox {FPGA}\)-based hybrid architecture of this anyOCR step along with its optimized software implementations are presented. We demonstrate our results on multiple embedded and general-purpose platforms with respect to runtime and power consumption. The resulting hardware accelerator outperforms the existing anyOCR by 6.2\(\times\), while achieving 207\(\times\) higher energy-efficiency and maintaining its high accuracy.



中文翻译:

i DocChip:用于历史文档图像处理的可配置硬件体系结构

近年来,\(\ hbox {光学字符识别(OCR)} \)系统已用于数字保存历史档案。要将历史档案记录转录成机器可读的形式,首先要扫描文档,然后应用\(\ hbox {OCR} \)。为了将文档数字化而不需要将其从存档位置删除,拥有一台结合了扫描和\(\ hbox {OCR} \)的便携式设备非常有价值能力。如今,存在许多针对当代文档进行了优化的商业和开源文档数字化技术。但是,由于这种文档的严重质量下降,因此它们不能为转录历史文档提供足够的文本识别精度。相反,anyOCR系统主要用于对历史文档进行数字化处理,可提供较高的准确性。然而,这是以高计算复杂度为代价的,从而导致长时间运行和高功耗。为了解决这些挑战,我们提出了一种具有实时功能的低功耗节能加速器,称为iDocChip,它是一种可配置的混合硬件-软件可编程\(\ hbox {片上系统(SoC)} \)基于anyOCR来对历史文档进行数字化处理。在本文中,我们专注于anyOCR系统中最关键的处理步骤之一:文本和图像分割,它利用了基于多分辨率形态学的算法。此外,还介绍了此anyOCR步骤的基于优化的\(\ hbox {FPGA} \)的混合体系结构及其优化的软件实现。我们在运行时间和功耗方面在多个嵌入式和通用平台上展示了​​我们的结果。最终的硬件加速器的性能比现有的anyOCR高出6.2 \(\ times \),同时实现了207 \(\ times \)更高的能源效率并保持了其高精度。

更新日期:2021-01-31
down
wechat
bug