Discrete Wavelet Transform (DWT) is widely used in digital image and video processing due to its various advantages over other similar transform techniques. In this paper, efficient hardware architecture of Optimized Haar Wavelet Transform is proposed which is modeled using Optimized Kogge–Stone Adder/Subtractor, Optimized Controller, Buffer, Shifter and D_FF blocks. The existing Kogge–Stone Adder architecture is optimized by using Modified Carry Correction block which uses parallel architecture to reduce the computational delay. Similarly, the Controller block is optimized by using Clock Dividers and Reset Counter interdependently. To preserve the accuracy of the processed data, suitable size of intermediate bits in fractional format with the help of Q-notation is considered. The comparison results show that the proposed architecture performs better than existing ones concerning both hardware utilization and data accuracy.

离散小波变换（DWT）由于其相对于其他类似变换技术的各种优势而被广泛用于数字图像和视频处理。本文提出了一种优化的Haar小波变换的高效硬件架构，该架构使用优化的Kogge–Stone加法器/减法器，优化的控制器，缓冲区，移位器和D_FF块进行建模。现有的Kogge–Stone Adder体系结构通过使用经过改进的进位校正模块进行了优化，该模块采用并行体系结构来减少计算延迟。同样，通过使用时钟分频器和复位计数器来优化控制器模块相互依存 为了保持处理后的数据的准确性，可以考虑借助Q表示法以小数格式设置适当的中间位大小。比较结果表明，在硬件利用率和数据准确性方面，所提出的体系结构均优于现有体系结构。