This study proposes a modified modulation scheme based on the phase-shifted pulse-width modulation (PS-PWM) method to improve the output performance and reduce the switching loss in cascaded H-bridge multilevel inverters. The PS-PWM method is one of the most popular modulation schemes. However, it generates significant switching loss, which can lead to the failure of power semiconductor switches. Various studies have proposed modulation schemes to reduce switching loss. The clamped discontinuous PWM (DPWM) method achieves the best switching loss reduction performance in comparison with other modulation schemes. However, the clamped DPWM method has low output characteristics, such as total harmonic distortion. The proposed modulation scheme achieves the same switching loss reduction and improved output performance by modifying the dwell time order. The proposed evenly clamped DPWM method was compared with the conventional clamped DPWM method through simulations and experiments.

本研究提出一种基于相移脉冲宽度调制（PS-PWM）方法的改进的调制方案，以改善级联H桥多电平逆变器的输出性能并降低开关损耗。PS-PWM方法是最流行的调制方案之一。但是，它会产生很大的开关损耗，这可能导致功率半导体开关出现故障。各种研究提出了调制方案以减少开关损耗。与其他调制方案相比，钳位不连续PWM（DPWM）方法可实现最佳的开关损耗降低性能。但是，钳位DPWM方法具有较低的输出特性，例如总谐波失真。所提出的调制方案通过修改驻留时间顺序来实现相同的开关损耗降低和改善的输出性能。