Abstract

The compact models of junction field effect transistors (JFETs) used in release-quality versions of SPICE-like programs are focused only on the standard temperatures ranging from –60 to 150°C and are unworkable for an electronic circuit design in the cryogenic temperature range (below –120°C). It this study, the Low-T SPICE model of the JFET for designing electronic circuits in the extended temperature range, including the cryogenic range (from –200 to 110°С), is proposed. The model takes into account the changes in the I–V curves caused by the effect of ultralow temperature: growth of the saturation voltage V_{D sat}, decrease of the pinch-off current I_p and steepness BETA, negative slope LAMBDA of the output I–V curves, increase of the drain–source resistance RD as the result of the freezing effect, etc. For this purpose, the dependences of the specified parameters on temperature are introduced in the model. The procedure for extracting the SPICE parameters of the Low-T SPICE model of the JFET is developed according to the results of the measurements of the standard set of the I–V curves in the cryogenic temperature range. The error of the calculation of the I–V curves is not higher than 10–15% in the temperature range from –200 to 110°C.

中文翻译：

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在低温温度范围内模拟JFET的电流-电压特性的特殊功能

摘要

在类似SPICE的程序的发行质量版本中使用的结型场效应晶体管（JFET）的紧凑型模型仅专注于–60至150°C的标准温度，不适用于低温温度范围内的电子电路设计（低于–120°C）。这项研究提出了JFET的Low-T SPICE模型，该模型用于在扩展温度范围内设计电子电路，包括低温范围（从–200到110°С）。该模型考虑了由超低温引起的I–V曲线的变化：饱和电压V _{D sat的}增长，夹断电流I _p的减小和陡度BETA，负斜率输出I–V曲线的LAMBDA，由于冻结效应而导致的漏源电阻RD的增加等。为此，在模型中引入了指定参数对温度的依赖性。JFET的Low-T SPICE模型的SPICE参数的提取程序是根据在低温温度范围内的I–V曲线的标准集的测量结果而开发的。在–200至110°C的温度范围内，IV曲线的计算误差不超过10–15％。