The increased switching frequency and speed of silicon carbide (SiC) MOSFETs lead to higher power density of inverters, but meanwhile resulting in weak electromagnetic interference (EMI). The impedance balance technique is a good way to reduce the common mode (CM) noise by making the voltage across the line impedance stabilization network (LISN) as small as possible. However, a side effect of this technique is the generation of relatively large loop current that circulates in the inverter. It can cause additional losses and cost, which can be a factor that stops the increase of the switching frequency by SiC MOSFET. This article, for the first time, analyzes the relationship between the CM noise and loop current of the three-level active neutral point clamped (ANPC) inverter, and proposes a co-reduction method for both. First, the CM noise and loop current are clarified for the ANPC inverter, and the analytical models for both are established. The conflict between the CM noise and loop current is introduced with a specific case by the existing design method. Then a co-reduction method is proposed and elaborated, which can both suppress the CM noise and the loop current. The extra cost and volume by the proposed method are also analyzed and are negligible. The design guideline is further shown for clarity. Finally, the analysis and proposed method is validated by the experiment.

中文翻译：

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三电平有源中性点钳位逆变器的共模噪声和环路电流的共减小

碳化硅（SiC）MOSFET的开关频率和速度提高，导致逆变器的功率密度更高，但同时又导致了较弱的电磁干扰（EMI）。阻抗平衡技术是通过使跨线阻抗稳定网络（LISN）的电压尽可能小来降低共模（CM）噪声的好方法。然而，该技术的副作用是产生了在逆变器中循环的相对较大的环路电流。这可能会导致额外的损耗和成本，这可能是阻止SiC MOSFET增加开关频率的一个因素。本文首次分析了三电平有源中性点钳位（ANPC）逆变器的CM噪声与环路电流之间的关系，并提出了两者的共减小方法。第一，明确了ANPC逆变器的CM噪声和环路电流，并建立了两者的分析模型。通过现有设计方法，结合具体情况介绍了CM噪声与环路电流之间的矛盾。然后提出并阐述了一种共抑制方法，可以同时抑制CM噪声和环路电流。所提出的方法的额外成本和数量也进行了分析，可以忽略不计。为了清楚起见，进一步显示了设计指南。最后，通过实验验证了所提出的分析方法。这可以同时抑制CM噪声和环路电流。所提出的方法的额外成本和数量也进行了分析，可以忽略不计。为了清楚起见，进一步显示了设计指南。最后，通过实验验证了所提出的分析方法。这可以同时抑制CM噪声和环路电流。所提出的方法的额外成本和数量也进行了分析，可以忽略不计。为了清楚起见，进一步显示了设计指南。最后，通过实验验证了所提出的分析方法。