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An Efficient Communication Protocol for FPGA IP Protection
arXiv - CS - Hardware Architecture Pub Date : 2021-01-21 , DOI: arxiv-2101.08754
Farzane Khajuyi, Behnam Ghavami, Human Nikmehr

We introduce a protection-based IP security scheme to protect soft and firm IP cores which are used on FPGA devices. The scheme is based on Finite State Machin (FSM) obfuscation and exploits Physical Unclonable Function (PUF) for FPGA unique identification (ID) generation which help pay-per-device licensing. We introduce a communication protocol to protect the rights of parties in this market. On standard benchmark circuits, the experimental results show that our scheme is secure, attack-resilient and can be implemented with low area, power and delay overheads.

中文翻译:

FPGA IP保护的高效通信协议

我们引入了一种基于保护的IP安全方案,以保护FPGA器件上使用的软而坚固的IP核。该方案基于有限状态机(FSM)混淆,并利用物理不可克隆功能(PUF)生成FPGA唯一标识(ID),从而有助于按设备付费。我们引入一种通信协议来保护此市场中各方的权利。在标准基准电路上,实验结果表明,我们的方案是安全的,具有抗攻击性的,并且可以以较小的面积,功耗和延迟开销来实现。
更新日期:2021-01-22
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