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A 0.11-0.38 pJ/cycle Differential Ring Oscillator in 65 nm CMOS for Robust Neurocomputing
IEEE Transactions on Circuits and Systems I: Regular Papers ( IF 5.2 ) Pub Date : 2021-02-01 , DOI: 10.1109/tcsi.2020.3036454
Xueyong Zhang , Jyotibdha Acharya , Arindam Basu

This paper presents a low-area and low-power consumption CMOS differential current controlled oscillator (CCO) for neuromorphic applications. The oscillation frequency is improved over the conventional one by reducing the number of MOS transistors thus lowering the load capacitor in each stage. The analysis shows that for the same power consumption, the oscillation frequency can be increased about 11% compared with the conventional one without degrading the phase noise. Alternatively, the power consumption can be reduced 15% at the same frequency. The prototype structures are fabricated in a standard 65 nm CMOS technology and measurements demonstrate that the proposed CCO operates from 0.7 – 1.2 V supply with maximum frequencies of 80 MHz and energy/cycle ranging from 0.11 – 0.38 pJ over the tuning range. Further, system level simulations show that the nonlinearity in current-frequency conversion by the CCO does not affect its use as a neuron in a Deep Neural Network if accounted for during training.

中文翻译:

用于稳健神经计算的 65 nm CMOS 中的 0.11-0.38 pJ/周期差分环形振荡器

本文介绍了一种用于神经形态应用的小面积、低功耗 CMOS 差分电流控制振荡器 (CCO)。通过减少MOS晶体管的数量从而降低每一级的负载电容器,振荡频率比传统频率有所提高。分析表明,在相同的功耗下,在不降低相位噪声的情况下,振荡频率比传统的可提高约11%。或者,在相同频率下,功耗可以降低 15%。原型结构采用标准 65 nm CMOS 技术制造,测量结果表明,提议的 CCO 在 0.7 – 1.2 V 电源下工作,最大频率为 80 MHz,能量/周期在调谐范围内为 0.11 – 0.38 pJ。更多,
更新日期:2021-02-01
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