Under the requirement of highly reliable encryption, the design of true random number generators (TRNGs) based on field-programmable gate arrays (FPGAs) is receiving increased attention. Although TRNGs based on ring oscillators (ROs) and phase-locked loops (PLLs) have the advantages of small resource overhead and high throughput, there are problems such as instability of randomness and poor portability. To improve the randomness, portability, and throughput of a random number generator, we design a TRNG whose randomness is generated by the oscillation of self-timed rings (STRs) and accurately extracted by a jitter-latch structure. The portability of the structure is verified by electronic design automation (EDA) tools. Under the condition of 0°C–80°C ambient temperature and 1.0 ± 0.1 V output voltage, the proposed structure is tested many times on Xilinx Spartan-6 and Virtex-6 FPGAs with an automatic routing mode. Theoretical analysis shows that this method can effectively improve the coverage of jitter and reduce the migration phenomenon. Experimental results show excellent performance in randomness, robustness, and portability, and the throughput reaches 100 Mbps.

中文翻译：

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基于抖动锁存结构的高吞吐量便携式真随机数发生器

在高度可靠的加密要求下，基于现场可编程门阵列（FPGA）的真随机数发生器（TRNG）的设计越来越受到关注。基于环形振荡器（RO）和锁相环（PLL）的TRNG虽然具有资源开销小、吞吐量高的优点，但也存在随机性不稳定、便携性差等问题。为了提高随机数发生器的随机性、便携性和吞吐量，我们设计了一个 TRNG，其随机性由自定时环 (STR) 的振荡生成，并通过抖动锁存结构准确提取。该结构的可移植性通过电子设计自动化 (EDA) 工具进行验证。在 0°C–80°C 环境温度和 1.0 ± 0.1 V 输出电压条件下，建议的结构在 Xilinx Spartan-6 和 Virtex-6 FPGA 上使用自动路由模式进行了多次测试。理论分析表明，该方法可以有效提高抖动的覆盖范围，减少迁移现象。实验结果表明，在随机性、鲁棒性和可移植性方面具有优异的性能，吞吐量达到100 Mbps。