The increase in the number of edge devices has led to the emergence of edge computing where the computations are performed on the device. In recent years, deep neural networks (DNNs) have become the state-of-the-art method in a broad range of applications, from image recognition, to cognitive tasks to control. However, neural network models are typically large and computationally expensive and therefore not deployable on power and memory constrained edge devices. Sparsification techniques have been proposed to reduce the memory foot-print of neural network models. However, they typically lead to substantial hardware and memory overhead. In this article, we propose a hardware-aware pruning method using linear feedback shift register (LFSRs) to generate the locations of non-zero weights in real-time during inference. We call this LFSR-generated pseudo-random sequence based sparsity (LGPS) technique. We explore two different architectures for our hardware-friendly LGPS technique, based on (1) row/column indexing with LFSRs and (2) column-wise indexing with nested LFSRs, respectively. Using the proposed method, we present a total saving of energy and area up to 37.47% and 49.93% respectively and speed up of $1.53\times $ w.r.t the baseline pruning method, for the VGG-16 network on down-sampled ImageNet.

中文翻译：

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基于 LFSR 生成的伪随机序列的稀疏神经网络的硬件友好方法

边缘设备数量的增加导致了在设备上执行计算的边缘计算的出现。近年来，深度神经网络 (DNN) 已成为广泛应用中的最先进方法，从图像识别到认知任务再到控制。然而，神经网络模型通常很大且计算成本高，因此无法部署在功率和内存受限的边缘设备上。已经提出了稀疏化技术来减少神经网络模型的内存占用。然而，它们通常会导致大量的硬件和内存开销。在本文中，我们提出了一种硬件感知修剪方法，该方法使用线性反馈移位寄存器 (LFSR) 在推理过程中实时生成非零权重的位置。我们称这种基于 LFSR 生成的伪随机序列的稀疏性 (LGPS) 技术。我们为我们的硬件友好 LGPS 技术探索了两种不同的架构，分别基于（1）使用 LFSR 的行/列索引和（2）使用嵌套 LFSR 的列索引。使用所提出的方法，对于下采样 ImageNet 上的 VGG-16 网络，我们分别提出了高达 37.47% 和 49.93% 的能量和面积的总节省，并且比基线修剪方法的速度提高了 1.53 美元\x 美元。