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An Optimal Digital Filtering Technique for Incremental Delta-Sigma ADCs Using Passive Integrators
Electronics ( IF 2.9 ) Pub Date : 2021-01-18 , DOI: 10.3390/electronics10020213
Hyunmin Park , Hyungil Chae , Jintae Kim

This paper presents an optimal digital filtering technique to enhance the resolution of incremental delta-sigma modulators (incremental DSMs, IDSMs) using a low-power passive integrator. We first describe a link between a passive integrator and its impact on the output of the IDSM. We then show that the optimal digital filter design can be cast as a convex optimization problem, which can be efficiently solved. As a test vehicle of the proposed technique, we use a behavioral 2nd-order IDSM model that captures critical non-idealities of the integrator, such as gain compression and output saturation. The effectiveness of the presented technique is verified using extensive simulations. The result shows that the presented filtering technique improves signal-to-noise and distortion ratio (SNDR) by 15 dB–20 dB, achieving SNDR over 90 dB when the oversampling ratio (OSR) = 256, and this corresponds to best-in-class performance when compared to previously published DSM designs using passive integrators.

中文翻译:

使用无源积分器的增量Delta-Sigma ADC的最佳数字滤波技术

本文提出了一种最佳的数字滤波技术,以使用低功率无源积分器来提高增量式delta-sigma调制器(增量式DSM,IDSM)的分辨率。我们首先描述无源积分器及其对IDSM输出的影响之间的联系。然后,我们表明,最佳数字滤波器设计可以看作是凸优化问题,可以有效解决。作为所提出技术的测试工具,我们使用行为二阶IDSM模型,该模型捕获了积分器的关键非理想性,例如增益压缩和输出饱和。通过广泛的仿真验证了所提出技术的有效性。结果表明,提出的滤波技术将信噪比和失真比(SNDR)提高了15 dB–20 dB,
更新日期:2021-01-18
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