Over the past few years, Convolution Neural Networks (CNN) have been extensively adopted in broad AI applications and have achieved noticeable effect. Deploying the feedforward inference of CNN on edge devices has now been considered a research hotspot in Edge Computing. In terms of the mobile embedded devices that exhibit constrained resources and power budget, the considerable parameters and computational bottlenecks raised rigorous requirements of deploying the CNN feedforward inference. To address this challenge, the present study develops a lightweight neural network architecture termed as SparkNet, capable of significantly reducing the weight parameters and computation demands. The feasibility of the SparkNet is verified on four datasets, i.e., MINIST, CIFAR-10, CIFAR-100 and SVHN. Besides, the SparkNet is reported exhibiting the ability to effectively compress the convolutional neural network by a factor of 150x. Compared with GPU and ASIC, an FPGA-based accelerator exhibits obvious advantages for its reconfigurable property, flexibility, power efficiency, as well as massive parallelism. Moreover, the network model of the SparkNet and the proposed accelerator architecture are both specifically built for FPGA. The SparkNet on chip (SparkNOC) that maps all the layers of the network to their own dedicated hardware unit for simultaneous pipelined work has been implemented on FPGA. The proposals of this study are assessed by deploying SparkNet model on Intel Arria 10 GX1150 FPGA platform. As revealed from the experimental results, the fully pipelined CNN hardware accelerator achieves 337.2 GOP/s performance under the energy efficiency of 44.48 GOP/s/w, indicating that it outperforms the previous methods.

在过去的几年中，卷积神经网络（CNN）已在广泛的AI应用程序中被广泛采用，并取得了显着的效果。现在，在边缘设备上部署CNN前馈推理已被认为是边缘计算的研究热点。对于具有受限资源和功率预算的移动嵌入式设备而言，相当大的参数和计算瓶颈提出了部署CNN前馈推理的严格要求。为了应对这一挑战，本研究开发了一种称为SparkNet的轻量级神经网络体系结构，能够显着减少重量参数和计算需求。SparkNet的可行性在MINIST，CIFAR-10，CIFAR-100和SVHN四个数据集上得到了验证。除了，据报道，SparkNet具有将压缩卷积神经网络有效压缩150倍的能力。与GPU和ASIC相比，基于FPGA的加速器具有可重新配置的特性，灵活性，功率效率以及大规模并行性，因此具有明显的优势。此外，SparkNet的网络模型和建议的加速器体系结构都是专门针对FPGA构建的。在FPGA上实现了SparkNet片上（SparkNOC），它将网络的所有层映射到他们自己的专用硬件单元，以便同时进行流水线工作。通过在Intel Arria 10 GX1150 FPGA平台上部署SparkNet模型可以评估本研究的建议。从实验结果可以看出，全流水线CNN硬件加速器达到了337。