An energy‐efficient switching scheme based on distributing most significant bit capacitors for successive approximation register analog‐to‐digital converter,International Journal of Circuit Theory and Applications

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An energy‐efficient switching scheme based on distributing most significant bit capacitors for successive approximation register analog‐to‐digital converter
International Journal of Circuit Theory and Applications ( IF 1.8 ) Pub Date : 2021-01-12 , DOI: 10.1002/cta.2941
Zhiguo Yu ₁ , Tao Wang ₂ , Xinyu Song ₁ , Tian Wang ₁ , Kangsheng Liu ₁ , Xiaofeng Gu ₁

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This paper proposes an energy‐efficient switching scheme for successive approximation register (SAR) analog‐to‐digital converter (ADC). Compared with the traditional scheme with only two reference voltages, this switching scheme can save 95.93% of the switching energy and reduce the total capacitance by 75%. The most significant bit (MSB) capacitor is distributed into two parallel binary‐weighted capacitors, which results in a 1/2CV²_ref reduction in the switching energy in the third comparison. The dummy capacitors are replaced with two sets of unit capacitors to avoid using the reference voltage of 1/2V_ref during the last comparison.

中文翻译：

基于分配最高有效位电容器的高效节能开关方案，用于逐次逼近寄存器模数转换器

本文提出了一种用于逐次逼近寄存器（SAR）模数转换器（ADC）的节能开关方案。与仅具有两个参考电压的传统方案相比，该开关方案可节省95.93％的开关能量，并且可将总电容降低75％。在第三个比较中，最高有效位（MSB）电容器分配到两个并联的二进制加权电容器中，从而使开关能量降低了1/2 CV ²_ref。将虚拟电容器替换为两组单位电容器，以避免在上一次比较期间使用1/2 V _ref的基准电压。

更新日期：2021-03-17

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