In this work, we present an asynchronous MTJ-CMOS hybrid system with extremely fine-grained voltage scaling (EFGVS) technique. The supply voltage of the system is turned on/off by asynchronous bundled-data handshake signals. The MTJ write circuit is variation robust, self-terminated and redundant-write preventing. Besides, EFGVS and asynchronous data driven handshake enhance the timing robustness by removing the matching delay elements and reducing timing assumptions. The completion detection circuitry is also simplified. A RISC processor with proposed techniques is designed and fabricated by 55nm technology. The voltage supplies are turned on/off within tens of picoseconds. The energy for writing MTJs is 0.45pJ. The tolerance of the minimum TMR due to process variation is 75%. Sleep mode leakage power can be reduced over 10 $\times$ by powering off modules with the Break-even Time of 23.6 ns. Because of the extremely fine-grained voltage scaling, no more than 20% of the modules are powered on during the execution.

中文翻译：

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基于 MTJ 的具有极细粒度电压调节的异步系统

在这项工作中，我们提出了一种具有极细粒度电压缩放 (EFGVS) 技术的异步 MTJ-CMOS 混合系统。系统的电源电压由异步捆绑数据握手信号打开/关闭。MTJ 写入电路具有变化鲁棒性、自终止和冗余写入防止功能。此外，EFGVS 和异步数据驱动握手通过去除匹配延迟元素和减少时序假设来增强时序鲁棒性。完成检测电路也得到了简化。采用 55nm 技术设计和制造了具有建议技术的 RISC 处理器。电压供应在几十皮秒内打开/关闭。写入 MTJ 的能量为 0.45pJ。由于工艺变化引起的最小 TMR 的容差为 75%。通过以 23.6 ns 的盈亏平衡时间关闭模块，可以将睡眠模式泄漏功率降低 10 $\times$。由于极细粒度的电压缩放，在执行期间不超过 20% 的模块上电。