Approximate circuit design has gained significance in recent years targeting error-tolerant applications. In the literature, there have been several attempts at optimizing the number of approximate bits of each approximate adder in a system for a given accuracy constraint. For computational efficiency, the error models used in these routines are simple expressions obtained using regression or by assuming inputs or the error is uniformly distributed. In this article, we first demonstrate that for many approximate adders, these assumptions lead to an inaccurate prediction of error statistics for multi-level circuits. We show that mean error and mean square error can be computed accurately if static probabilities of adders at all stages are taken into account. Therefore, in a system with a certain type of approximate adder, any optimization framework needs to take into account not just the functionality of the adder but also its position in the circuit, functionality of its parents, and the number of approximate bits in the parent blocks. We propose a method to derive parameterized error models for various types of approximate adders. We incorporate these models within an optimization framework and demonstrate that the noise power is computed accurately.

中文翻译：

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使用近似加法器的参数化误差模型优化信号处理应用

近年来，针对容错应用的近似电路设计具有重要意义。在文献中，针对给定的精度约束，已经多次尝试优化系统中每个近似加法器的近似位数。为了计算效率，这些例程中使用的误差模型是使用回归或通过假设输入或误差均匀分布获得的简单表达式。在本文中，我们首先证明对于许多近似加法器，这些假设会导致对多级电路的误差统计的预测不准确。我们表明，如果考虑所有阶段的加法器的静态概率，则可以准确计算平均误差和均方误差。因此，在具有某种近似加法器的系统中，任何优化框架不仅需要考虑加法器的功能，还需要考虑其在电路中的位置、其父模块的功能以及父模块中的近似位数。我们提出了一种为各种类型的近似加法器推导参数化误差模型的方法。我们将这些模型合并到一个优化框架中，并证明噪声功率是准确计算的。