In the field of low power VLSI, the charge recovery property of adiabatic logic has been liked by the VLSI researchers. And this stimulates the research of various charge recovery techniques for low power computation. The applications of adiabatic logic in digital circuits are well understood, whereas mixed signals and analog circuits are yet to be explored. In this work, the author presents a wave shaping diode-based adiabatic logic (WSDAL) driven strong ARM comparator. The proposed ARM comparator consumes a power of 0.46 µW as compared to 14.41 µW and 8.77 µW as that of traditional strong ARM and adiabatic driven strong ARM, respectively. The reduction in power dissipation is achieved by three ways, (1) the proposed design consists of WSDAL based invertor for SR latch inputs that reduces the power dissipation up to a great extent by charge recycling through PCb (power clock bar). (2) The magnitude of PCb is half as that of PC (power clock), which reduces the node voltage difference and ultimately reduces the power dissipation, (3) the leakage and short circuit components of current get reduced utilizing PC as a sinusoidal supply. The proposed design also shows better thermal stability with varying temperature conditions.

在低功率VLSI领域，绝热逻辑的电荷恢复特性已受到VLSI研究人员的青睐。这激发了用于低功耗计算的各种电荷恢复技术的研究。绝热逻辑在数字电路中的应用已广为人知，而混合信号和模拟电路仍有待探索。在这项工作中，作者提出了一种基于波形整形二极管的绝热逻辑（WSDAL）驱动的强大ARM比较器。拟议的ARM比较器功耗为0.46 µW，而传统强ARM和绝热驱动强ARM分别为14.41 µW和8.77 µW。功耗的降低可通过三种方式实现：（1）提出的设计包括用于SR锁存器输入的基于WSDAL的反相器，该反相器通过通过PCb（电源时钟条）进行电荷回收，在很大程度上降低了功耗。（2）PCb的大小是PC（电源时钟）的一半，这减小了节点电压差并最终降低了功耗；（3）利用PC作为正弦电源，可减少电流的泄漏和短路分量。所提出的设计还显示出在变化的温度条件下更好的热稳定性。