Herein, we investigate the technologically relevant blend of the ferroelectric polymer poly(vinylidene fluoride-co-trifluoroethylene), P(VDF-co-TrFE), with the semiconducting polymer poly(3-hexylthiophene), P3HT, by means of a combination of scanning probe microscopy techniques, namely atomic force microscopy, conductive force microscopy, kelvin probe force microscopy, and piezoresponse force microscopy. This combination proves to be a powerful tool for the non-destructive morphological reconstruction of multi-functional nano-structured thin films, as those under study. Each modality allows discerning the two blend constituents based on their functionality, and, additionally, probes layers of different thickness with respect to the film surface. The depth-dependent information that is collected allows a qualitative reconstruction of the blend’s composition and morphology both in-plane and out-of-plane of the film. We demonstrate that P3HT exhibits the tendency to reside the film surface at an almost constant composition of 15%, independent of blend’s composition. Increasing the P3HT content in the blend results in the segregation of P3HT at the upper layers of the films, partially buried below a P(VDF-co-TrFE) superficial layer. The depletion of P3HT from the substrate/film interface is reflected by the poor existence of conducting pathways that connect the top and bottom planes of the film. The three-dimensional morphology of this polymer blend that is revealed thanks to the employed techniques deviates substantially from the ideal morphology proposed for the efficient performance of the targeted memory devices.

中文翻译：

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铁电：半导体聚合物共混薄膜的非破坏性深度依赖形态表征

在此，我们研究了铁电聚合物聚（偏二氟乙烯-三氟乙烯）P（VDF-co-TrFE）与半导体聚合物聚（3-己基噻吩）P3HT 的技术相关共混物，通过组合扫描探针显微镜技术，即原子力显微镜、导电力显微镜、开尔文探针力显微镜和压电响应力显微镜。正如所研究的那样，这种组合被证明是多功能纳米结构薄膜无损形态重建的有力工具。每种模式都允许根据其功能区分两种混合成分，此外，还可以探测相对于薄膜表面的不同厚度层。收集到的深度相关信息允许对膜的平面内和平面外的混合物的成分和形态进行定性重建。我们证明 P3HT 表现出以几乎恒定的 15% 组成停留在薄膜表面的趋势，与共混物的组成无关。增加混合物中 P3HT 的含量会导致 P3HT 在薄膜的上层分离，部分掩埋在 P(VDF-co-TrFE) 表面层下方。P3HT 从基板/薄膜界面的消耗反映在连接薄膜顶部和底部平面的导电通路的不良存在上。