This article presents a group delay controller (GDC) circuit based on the delay-sum method. The proposed circuit can potentially be employed in a self-interference cancellation circuit in full-duplex radio systems. The proposed GDC splits the input signal into two signals with different magnitudes and then combines them in-phase at the output port. Variable group delay can be achieved by changing the power ratio of the two signals. The power dividing ratio (PDR) is changed by employing a variable power divider/combiner (VPD/VPC). The resonant reflective loads substitute for a single varactor diode such that the limited PDR of the VPD/VPC does not degrade the group delay variation range of the GDC. The resonant load can provide infinite PDR by covering open to short susceptance. In addition, asymmetrically connecting the VPD and VPC provides a flatter group delay response. As a result, the delay-sum method enables the proposed GDC to provide low and constant insertion loss while providing low insertion phase variation. The proposed delay sum GDC is demonstrated at 2.5 GHz. The measured insertion loss is only 2.18± 0.28 dB with a continuously controlled relative group delay of 430 ps. Furthermore, the insertion phase variation is only 7.3° at 2.5 GHz, and input/output matchings are maintained for all delay settings.

中文翻译：

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具有低损耗和低相位变化的延迟总和群延迟控制器

本文介绍了一种基于延迟和方法的群延迟控制器 (GDC) 电路。所提出的电路有可能用于全双工无线电系统中的自干扰消除电路。建议的 GDC 将输入信号分成两个不同幅度的信号，然后在输出端口将它们同相组合。通过改变两个信号的功率比可以实现可变群延迟。通过采用可变功率分配器/组合器 (VPD/VPC) 来改变功率分配比 (PDR)。谐振反射负载替代了单个变容二极管，这样 VPD/VPC 的有限 PDR 不会降低 GDC 的群延迟变化范围。谐振负载可以通过覆盖开路到短路电纳来提供无限的 PDR。此外，非对称连接 VPD 和 VPC 可提供更平坦的群延迟响应。因此，延迟和方法使建议的 GDC 能够提供低且恒定的插入损耗，同时提供低插入相位变化。建议的延迟总和 GDC 在 2.5 GHz 下演示。测得的插入损耗仅为 2.18±0.28 dB，连续控制的相对群延迟为 430 ps。此外，在 2.5 GHz 时插入相位变化仅为 7.3°，并且所有延迟设置都保持输入/输出匹配。28 dB，连续控制的相对群延迟为 430 ps。此外，在 2.5 GHz 时插入相位变化仅为 7.3°，并且所有延迟设置都保持输入/输出匹配。28 dB，连续控制的相对群延迟为 430 ps。此外，在 2.5 GHz 时插入相位变化仅为 7.3°，并且所有延迟设置都保持输入/输出匹配。