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Analytical modeling of linearity and intermodulation distortion of 3D gate all around junctionless (GAA - JL) FET
Micro and Nanostructures ( IF 2.7 ) Pub Date : 2021-01-05 , DOI: 10.1016/j.spmi.2020.106788
Ankush Chattopadhyay , Manash Chanda , Chayanika Bose , Chandan K. Sarkar

This paper presents analytical modeling of linearity and intermodulation distortion of a rectangular GAA JL FET using 3D surface potential and drain current. The surface potential (ψ(x,y,z)) of the GAA JL FET is derived based on the ψ(x,y,z) dimension based approximation approach (i.e., weighted sum of ψ(x,y) and ψ(x,z)). The proposed method provides an alternate solution that yields good accuracy, avoiding the critical mathematical computations of conventional 3D analysis. The depletion length and the drain current are also determined analytically. Moreover, with this current expression, the device's linearity performance has been examined based on PIP3, VIP2, VIP3, and IMD3. Therefore, the analysis optimizes the device's bias point for RFICs with an analytical model for better linearity performance.



中文翻译:

围绕无结(GAA-JL)FET的3D栅极的线性和互调失真的解析模型

本文介绍了使用3D表面电势和漏极电流对矩形GAA JL FET进行线性度和互调失真的分析建模。表面电位ψXÿžGAA JL FET的计算基于 ψXÿž 基于维的近似方法(即, ψXÿψXž)。所提出的方法提供了一种替代解决方案,该解决方案产生了良好的准确性,避免了常规3D分析的关键数学计算。耗尽长度和漏极电流也可以通过分析确定。此外,利用该当前表达式,基于以下公式检查了器件的线性性能P一世P3V一世P2V一世P3一世中号d3。因此,该分析使用分析模型优化了RFIC的器件偏置点,以实现更好的线性性能。

更新日期:2021-01-10
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