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Single-Phase to Three-Phase Power Converter with Reduced DC-Link Voltage Ripple and Grid Current Harmonics
IEEE Transactions on Industry Applications ( IF 4.2 ) Pub Date : 2021-01-01 , DOI: 10.1109/tia.2020.3038357
Anup Kumar , Mohan Vithalrao Aware , Bhimrao S. Umre

This article presents a control technique to improve the power quality and performance of grid-connected single to three-phase power converter. The conventional five-leg (5L) topology is modified to parallel five-leg (P5L) topology that has fault tolerance capability and operates even either of the front end converter leg is open-circuited. In such topologies, lower order harmonics (3rd, 5th, 7th, 9th, 11th, 13th, and 15th) are dominant, which are eliminated using a proportional plus resonant controller in the inner current control loop of active front end converter (AFEC). The control technique implemented over single-phase AFEC controls the dc-link voltage and provides unity power factor operation at the grid side and also balances the individual capacitor voltages (Vc1 and Vc2) even under faulty conditions of power semiconductor switches. The dc-link voltage oscillation is the inherent problem of such converters, therefore, it is proposed to use advanced bus clamp PWM technique at the inverter side to reduce such ripples and also improves the inverter output voltage profile. The comparative improvement under operating conditions is presented through the simulation and verified on hardware setup to validate the efficacy of the control algorithm.

中文翻译:

具有降低的直流链路电压纹波和电网电流谐波的单相到三相功率转换器

本文提出了一种控制技术,以提高并网单相到三相电源转换器的电能质量和性能。传统的五支路 (5L) 拓扑被修改为并联五支路 (P5L) 拓扑,该拓扑具有容错能力,甚至可以在任一前端转换器支路开路时运行。在此类拓扑中,低阶谐波(3 次、5 次、7 次、9 次、11 次、13 次和 15 次)占主导地位,在有源前端转换器 (AFEC) 的内部电流控制回路中使用比例加谐振控制器可以消除这些谐波。在单相 AFEC 上实施的控制技术控制直流母线电压并在电网侧提供统一的功率因数运行,并且即使在功率半导体开关出现故障的情况下也能平衡各个电容器电压(Vc1 和 Vc2)。直流母线电压振荡是此类转换器的固有问题,因此,建议在逆变器侧使用先进的总线钳位 PWM 技术来减少此类纹波并改善逆变器输出电压分布。运行条件下的比较改进通过仿真呈现,并在硬件设置上进行验证,以验证控制算法的有效性。
更新日期:2021-01-01
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