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A 22-Gb/s Time-Interleaved Low-Power Optical Receiver With a Two-Bit Integrating Front End
IEEE Journal of Solid-State Circuits ( IF 4.6 ) Pub Date : 2021-01-01 , DOI: 10.1109/jssc.2020.3025051
Bahaa Radi , Mohammadreza Sanadgol Nezami , Mohammad Taherzadeh-Sani , Frederic Nabki , Michael Menard , Odile Liboiron-Ladouceur

This article presents the implementation of a novel 22-Gb/s energy-efficient optoelectronic receiver architecture in 65-nm CMOS for short-reach optical communication. The receiver incorporates four sub receivers with a two-bit integrating resettable front-end in each sub receiver. The inputs to two of the four sub receivers are optically delayed by one bit and two complementary quarter-rate clock phases are used to completely recover the data. The two-bit integrating low-bandwidth front end replaces the full-bandwidth transimpedance amplifier used in conventional optoelectronic receivers, resulting in improved energy efficiency. The low-bandwidth operation is enabled by using a capacitor at the input and by amplifying the two-bit integrated voltage with low-bandwidth voltage gain stages that require a bandwidth of only 35% of the operating data rate. The receiver performs a 1:4 demultiplexing operation by only using two quarter-rate clock phases instead of the four phases that are conventionally used in a quarter-rate clocking system. This clocking scheme reduces complexity while maintaining the same timing margin of the quarter-rate systems. This two-clock phase system is enabled by optical delay lines and splitters. The receiver is experimentally validated with a 1550-nm photodetector array wire bonded to the four inputs. The electronic part of the receiver achieves error-free transmission (BER < 10−12) at 22 Gb/s with an energy efficiency of 1.43 pJ/bit and an average sensitivity of −7.8 dBm (or −6.2 dBm optically modulated amplitude) with a 1.09-V supply.

中文翻译:

具有两位集成前端的 22 Gb/s 时间交织低功耗光接收器

本文介绍了在 65 nm CMOS 中实现用于短距离光通信的新型 22 Gb/s 节能光电接收器架构。接收器包含四个子接收器,每个子接收器中都有一个两位集成的可复位前端。四个子接收器中的两个的输入被光学延迟一位,并且两个互补的四分之一速率时钟相位用于完全恢复数据。两位集成低带宽前端取代了传统光电接收器中使用的全带宽跨阻放大器,从而提高了能效。低带宽操作是通过在输入端使用一个电容器并通过低带宽电压增益级放大两位积分电压来实现的,低带宽电压增益级只需要工作数据速率的 35% 的带宽。接收器通过仅使用两个四分之一速率时钟相位而不是四分之一速率时钟系统中常规使用的四个相位来执行 1:4 解复用操作。这种时钟方案降低了复杂性,同时保持了四分之一速率系统的相同时序余量。这种双时钟相位系统由光延迟线和分路器启用。接收器通过连接到四个输入端的 1550 nm 光电探测器阵列导线进行了实验验证。接收器的电子部分以 22 Gb/s 的速度实现无差错传输 (BER < 10−12),能效为 1。
更新日期:2021-01-01
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