By deploying a surface reinforcement layer (SRL) at the interface between Schottky metal and p-GaN in the gate stack, a p-GaN gate high-electron-mobility transistor (HEMT) with enhanced gate reliability is demonstrated. Prior to the gate metal deposition, the SRL is formed by an oxygen-plasma treatment and a subsequent high-temperature annealing process (at 800 °C) that enables surface reconstruction. Such a process converts several nanometers of p-GaN near the surface into a crystalline GaON layer, which exhibits stronger immunity to hot electron bombardment. With nearly identical threshold voltage and ON-resistance, the p-GaN gate HEMT with SRL yields two orders of magnitude reduction in gate leakage current at ON-state and an increase from 10.5 V to 12.7 V in forward gate breakdown voltage. Time-dependent gate breakdown measurement reveals an increase from 5.9 V to 7.8 V in the maximum ON-state gate drive voltage for a 10-year lifetime with a 1 % gate failure rate, which effectively expands the operating voltage margin of the p-GaN gate power HEMT.

中文翻译：

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具有表面强化的 p-GaN 栅极 HEMT 以提高栅极可靠性

通过在栅极堆叠中肖特基金属和 p-GaN 之间的界面处部署表面增强层 (SRL)，展示了具有增强栅极可靠性的 p-GaN 栅极高电子迁移率晶体管 (HEMT)。在栅极金属沉积之前，SRL 是通过氧等离子体处理和随后的高温退火工艺（在 800°C 下）形成的，从而能够进行表面重建。这种工艺将表面附近几纳米的 p-GaN 转化为晶体 GaON 层，对热电子轰击表现出更强的免疫力。具有几乎相同的阈值电压和导通电阻，具有 SRL 的 p-GaN 栅极 HEMT 使导通状态下的栅极漏电流降低两个数量级，正向栅极击穿电压从 10.5 V 增加到 12.7 V。