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Multi-Level Memory Comprising Low-Temperature Poly-Silicon and Oxide TFTs
IEEE Electron Device Letters ( IF 4.1 ) Pub Date : 2020-11-10 , DOI: 10.1109/led.2020.3037059
Jongbin Kim , Hoon-Ju Chung , Seung-Woo Lee

In this letter, a new multi-level memory cell using low-temperature polycrystalline silicon and oxide (LTPO) thin-film transistor (TFT) backplane is proposed. The multi-bit data storage can be achieved with a simple structure of two transistors and a capacitor, which controls the threshold voltage of a memory cell transistor exactly. In a memory cell, the low-temperature polycrystalline silicon (LTPS) TFT provides excellent stability against bias stress or current stress. In addition, the oxide semiconductor TFT enables the long-term data storage by virtue of its extremely low off-state leakage current. The proposed memory is fabricated with the LTPO TFT process which includes p-type LTPS and n-type oxide TFTs. Furthermore, the implementation of the multi-level property is successfully verified by measured results.

中文翻译:

包含低温多晶硅和氧化物TFT的多层存储器

在这封信中,提出了一种使用低温多晶硅和氧化物(LTPO)薄膜晶体管(TFT)背板的新型多层存储单元。可以通过两个晶体管和一个电容器的简单结构来实现多位数据存储,该电容器可以精确地控制存储单元晶体管的阈值电压。在存储单元中,低温多晶硅(LTPS)TFT提供了出色的抵抗偏置应力或电流应力的稳定性。另外,氧化物半导体TFT由于其极低的截止态泄漏电流而能够长期存储数据。所提出的存储器是采用LTPO TFT工艺制造的,该工艺包括p型LTPS和n型氧化物TFT。此外,通过测量结果可以成功验证多级属性的实现。
更新日期:2020-12-25
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