Flash memory devices are winning the competition for storage density against magnetic recording devices. This outcome results from advances in physics that allow storage of more than one bit per cell, coupled with advances in signal processing that reduce the effect of physical instabilities. Constrained codes are used in storage to avoid problematic patterns, and thus prevent errors from happening. Recently, we introduced binary symmetric lexicographically-ordered constrained codes (LOCO codes) for data storage and data transmission. LOCO codes are capacity-achieving, simple, and can be easily reconfigured. This paper introduces simple constrained codes that support non-binary physical gates in multi, triple, quad, and the currently-in-development penta-level cell (M/T/Q/P-LC) Flash memories. The new codes can be easily modified if problematic patterns change with time. These codes are designed to mitigate inter-cell interference, which is a critical source of error in Flash devices. The occurrence of errors is a consequence of parasitic capacitances in and across floating-gate transistors, resulting in charge propagation from cells being programmed to the highest charge level to neighboring cells being programmed to lower levels or unprogrammed/erased. This asymmetric nature of error-prone patterns distinguishes Flash memories. The new codes are called $q$ -ary asymmetric LOCO codes (QA-LOCO codes), and the construction subsumes codes previously designed for single-level cell (SLC) Flash devices (A-LOCO codes). QA-LOCO codes work for a Flash device with any number, $q$ , of levels per cell. For $q \geq 4$ , we show that QA-LOCO codes can achieve rates greater than $0.95 \log _{2} \!q$ input bits per coded symbol. The complexity of encoding and decoding is modest, and reconfiguring a code is as easy as reprogramming an adder. Capacity-achieving rates, affordable encoding-decoding complexity, and ease of reconfigurability support the growing improvement of M/T/Q/P-LC Flash memory devices, as well as lifecycle management as the characteristics of these devices change with time, which increases their lifetime.

中文翻译：

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管理设备生命周期：M/T/Q/P-LC 闪存的可重构约束代码

闪存设备正在与磁记录设备的存储密度竞争中获胜。这一结果源于物理学的进步，允许每个单元存储多于一位，再加上信号处理的进步，减少了物理不稳定性的影响。在存储中使用约束代码来避免有问题的模式，从而防止错误的发生。最近，我们引入了二进制对称字典序约束代码（LOCO 代码）用于数据存储和数据传输。LOCO 代码是实现容量的、简单的，并且可以轻松地重新配置。本文介绍了支持多、三、四和当前正在开发的五级单元 (M/T/Q/P-LC) 闪存中的非二进制物理门的简单约束代码。如果有问题的模式随时间发生变化，则可以轻松修改新代码。这些代码旨在减轻小区间干扰，这是闪存设备中的一个关键错误来源。错误的发生是浮栅晶体管内部和两端的寄生电容的结果，导致电荷从被编程为最高电荷电平的单元传播到被编程为较低电平或未编程/擦除的相邻单元。容易出错的模式的这种不对称特性使闪存与众不同。新代码被称为 导致电荷从被编程为最高电荷电平的单元传播到被编程为较低电平或未编程/擦除的相邻单元。容易出错的模式的这种不对称特性使闪存与众不同。新代码被称为 导致电荷从被编程为最高电荷电平的单元传播到被编程为较低电平或未编程/擦除的相邻单元。容易出错的模式的这种不对称特性使闪存与众不同。新代码被称为 $q$ -ary 非对称 LOCO 代码（QA-LOCO 代码），并且该结构包含以前为单层单元 (SLC) 闪存设备设计的代码（A-LOCO 代码）。QA-LOCO 代码适用于任意编号的闪存设备， $q$ , 每个单元格的级别。为了 $q \geq 4$ ，我们表明 QA-LOCO 代码可以实现大于 $0.95 \log _{2} \!q$ 每个编码符号的输入位。编码和解码的复杂性适中，重新配置代码就像重新编程加法器一样简单。容量实现率、可负担的编解码复杂性和可重构性的便利性支持 M/T/Q/P-LC 闪存设备的不断改进，以及随着这些设备的特性随时间变化而增加的生命周期管理他们的一生。