The demand for electronic memories with increasing storage capabilities is always on the rise. Increasing the information density in the same silicon area is a desirable feature, making fast multilevel resistive switching devices a promising candidate. It is thus necessary to design writing and readout circuits that are able to take advantage of the technology's features. In this work, two multibit readout circuits based on non-balanced inverter are presented. The first one is a simple and size reduced flash-type ADC made of inverters, while the second one is a counter-type ADC circuit. Simulations were performed in 0.18 μm CMOS technology using a memristor model extracted from bibliography in order to analyze and compare functionality, power consumption and speed access. The resulting reading time is lower than 1.5 ns for the flash-type ADC and 12 ns for the counter-type ADC. Regarding layout area, the core circuit of the first architecture was implemented in 165 μm² and the second in 798 μm².

对具有增加的存储能力的电子存储器的需求一直在增长。在相同硅区域中增加信息密度是一个理想的功能，使快速多级电阻式开关器件成为有前途的候选方案。因此，有必要设计能够利用该技术功能的写入和读出电路。本文提出了两个基于非平衡逆变器的多位读出电路。第一个是由反相器制成的简单且尺寸减小的闪存型ADC，而第二个是计数器型ADC电路。使用从书目中提取的忆阻器模型，在0.18μmCMOS技术中进行了仿真，以分析和比较功能，功耗和速度访问。结果读取时间小于1。闪存型ADC为5 ns，计数器型ADC为12 ns。关于布局面积，第一种架构的核心电路实现为165μm²和798μm2中的第二^个。