This study proposes an analytical drain model of the strained junctionless nanowire tunnel field-effect transistor fabricated on the Si _{1 -x} Ge _x virtual substrate. The surface potential is derived by solving Poisson's equation in the channel region. Effects of the strained silicon on the potential profile can be expressed as a function of the Ge concentration in the Si _{1 -x} Ge _x virtual substrate. An analytical expression for the drain current is derived by using the tangent line approximation method. The strain induced in the device could reduce the effective tunnelling barrier significantly, resulting in a larger band-to-band tunnelling generation rate and, therefore, higher drive current compared with the unstrained device. Impacts of device parameters such as the channel diameter, gate oxide thickness and gate dielectric constant on the device performance are investigated. Results of the proposed model are verified by comparing with the device simulator.

中文翻译：

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制备的应变无结纳米线隧道场效应晶体管的漏极电流分析模型。 $ {\ rm S} {\ rm i} _ {1-x} {\ rm G} {\ rm e} _x $小号一世1个-XGËX 虚拟底物

这项研究提出了在Si _{1 -x} Ge _x虚拟衬底上制造的应变无结纳米线隧道场效应晶体管的分析漏极模型 。通过在沟道区域中求解泊松方程可得出表面电势。应变硅对电势分布的影响可以表示为Si _{1 -x} Ge _x中Ge浓度的 _函数虚拟底物。通过使用切线近似法导出漏极电流的解析表达式。器件中引起的应变可以显着减小有效的隧穿势垒，从而导致更大的带间隧穿生成速率，因此与未应变的器件相比，驱动电流更高。研究了诸如沟道直径，栅极氧化物厚度和栅极介电常数之类的器件参数对器件性能的影响。通过与设备模拟器进行比较，验证了所提出模型的结果。