Asynchronous quasi-delay-insensitive (QDI) circuits have recently become an active research area in digital logic design. In contrast with synchronous paradigms, QDI approaches utilise threshold gates with hysteresis, such as Muller C-element and null convention logic (NCL) gates. However, there are no existing methods to explicitly describe these hysteretic logic gates in Boolean algebra. Therefore, in this study, the authors extend the Boolean algebra with two novel operators, named completion and truth tuple, to enable explicit expressions for all QDI elements such as C-elements, NCL, NCL+, latches and several non-conventional hysteretic threshold gates that they call dual-threshold logic. In addition, they develop a set of 16 laws and theorems for these new operators to create a complete novel algebraic extension for QDI logic. It is demonstrated that the authors' extended algebra is a complete approach for explicit design and analysis of QDI circuits, including logic description, equation formation from truth table, expression simplification and conversion, and even gate mapping and corresponding CMOS implementation. They also provide an analysis and solution for netlist corruption problems during the synthesis process of existing QDI design flows, as well as a complete design example using the extended Boolean algebra with different QDI design styles.

中文翻译：

---

异步准延迟不敏感逻辑的扩展布尔代数

异步准延迟不敏感（QDI）电路最近已成为数字逻辑设计中活跃的研究领域。与同步范例相反，QDI方法利用具有滞后作用的阈值门，例如穆勒C元素和空约定逻辑（NCL）门。但是，没有现有方法可以在布尔代数中显式描述这些磁滞逻辑门。因此，在这项研究中，作者用两个新的运算符（称为完成和真元组）扩展了布尔代数，以使所有QDI元素（如C元素，NCL，NCL +，锁存器和几个非常规滞后门限门）的显式表达式成为可能。他们称之为双阈值逻辑。此外，他们为这些新的算子开发了一套16条定律和定理，从而为QDI逻辑创建了一个完整的新颖代数扩展。结果表明，作者的扩展代数是用于QDI电路的显式设计和分析的完整方法，包括逻辑描述，由真值表形成的方程式，表达式的简化和转换，甚至是门映射和相应的CMOS实现。它们还为现有QDI设计流程的综合过程中的网表损坏问题提供了分析和解决方案，并提供了使用具有不同QDI设计样式的扩展布尔代数的完整设计示例。