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Reconfigurable Smart In-Memory Computing Platform supporting Logic and Binarized Neural Networks for Low-Power Edge Devices
IEEE Journal on Emerging and Selected Topics in Circuits and Systems ( IF 3.7 ) Pub Date : 2020-12-01 , DOI: 10.1109/jetcas.2020.3030542
Tommaso Zanotti , Francesco Maria Puglisi , Paolo Pavan

Edge computing has been shown to be a promising solution that could relax the burden imposed onto the network infrastructure by the increasing amount of data produced by smart devices. However, reconfigurable ultra-low power computing architectures are needed. RRAM devices together with the material implication logic (IMPLY) are a promising solution for the development of low-power reconfigurable logic-in-memory (LiM) hardware. Nevertheless, traditional approaches suffer from several issues introduced by the circuit topology and device non-idealities. Recently, SIMPLY, a smart LiM architecture based on the IMPLY, has been proposed and shown to solve the common issues of traditional architectures. Here, we use a physics-based RRAM compact model calibrated on three RRAM technologies to further analyze the performance of SIMPLY in typical operating conditions, when the repeated execution of logic operation on the same group of devices is considered. The results show that, compared to the conventional IMPLY architecture, SIMPLY spares more than 40% of the high voltage pulses on average even when complex operations are considered (e.g., the 1-bit half adder). We also show how SIMPLY can implement the set of operations required for the implementation of Binarized Neural Networks (BNN) and benchmark its performance against other memristor-based BNN in-memory accelerator from the literature. The results suggest that our approach is more than two orders of magnitude efficient compared to the state of the art reconfigurable in-memory computing approach and could potentially reach the performance of specialized BNN analog hardware accelerators with appropriate device-circuit co-design strategies.

中文翻译:

支持低功耗边缘设备的逻辑和二值化神经网络的可重构智能内存计算平台

边缘计算已被证明是一种很有前途的解决方案,它可以减轻智能设备产生的数据量不断增加给网络基础设施带来的负担。然而,需要可重构的超低功耗计算架构。RRAM 器件与材料蕴涵逻辑 (IMPLY) 一起是开发低功耗可重构内存逻辑 (LiM) 硬件的有前途的解决方案。然而,传统方法受到电路拓扑和器件非理想性引入的几个问题的影响。最近,基于 IMPLY 的智能 LiM 架构 SIMPLY 被提出并被证明可以解决传统架构的常见问题。这里,当考虑在同一组设备上重复执行逻辑操作时,我们使用基于物理的 RRAM 紧凑模型在三种 RRAM 技术上进行校准,以进一步分析 SIMPLY 在典型工作条件下的性能。结果表明,与传统的 IMPLY 架构相比,即使在考虑复杂操作(例如,1 位半加器)时,SIMPLY 平均也节省了 40% 以上的高压脉冲。我们还展示了 SIMPLY 如何实现实现二值化神经网络 (BNN) 所需的一组操作,并将其性能与文献中其他基于忆阻器的 BNN 内存加速器进行对比。
更新日期:2020-12-01
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