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On-Chip Error-triggered Learning of Multi-layer Memristive Spiking Neural Networks
IEEE Journal on Emerging and Selected Topics in Circuits and Systems ( IF 3.7 ) Pub Date : 2020-12-01 , DOI: 10.1109/jetcas.2020.3040248
Melika Payvand , Mohammed E. Fouda , Fadi Kurdahi , Ahmed M. Eltawil , Emre O. Neftci

Recent breakthroughs in neuromorphic computing show that local forms of gradient descent learning are compatible with Spiking Neural Networks (SNNs) and synaptic plasticity. Although SNNs can be scalably implemented using neuromorphic VLSI, an architecture that can learn using gradient-descent in situ is still missing. In this paper, we propose a local, gradient-based, error-triggered learning algorithm with online ternary weight updates. The proposed algorithm enables online training of multi-layer SNNs with memristive neuromorphic hardware showing a small loss in the performance compared with the state-of-the-art. We also propose a hardware architecture based on memristive crossbar arrays to perform the required vector-matrix multiplications. The necessary peripheral circuitry including presynaptic, post-synaptic and write circuits required for online training, have been designed in the subthreshold regime for power saving with a standard 180 nm CMOS process.

中文翻译:

多层忆阻尖峰神经网络的片上错误触发学习

神经形态计算的最新突破表明,梯度下降学习的局部形式与尖峰神经网络 (SNN) 和突触可塑性兼容。尽管 SNN 可以使用神经形态 VLSI 进行可扩展的实现,但仍然缺少可以使用梯度下降原位学习的架构。在本文中,我们提出了一种具有在线三元权重更新的局部、基于梯度、错误触发的学习算法。所提出的算法能够使用忆阻神经形态硬件对多层 SNN 进行在线训练,与最先进的技术相比,性能损失很小。我们还提出了一种基于忆阻交叉阵列的硬件架构来执行所需的向量矩阵乘法。必要的外围电路,包括突触前、
更新日期:2020-12-01
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