Instruction prefetching can play a pivotal role in improving the performance of workloads with large instruction footprints and frequent, costly frontend stalls. In particular, Fetch Directed Prefetching (FDP) is an effective technique to mitigate frontend stalls since it leverages existing branch prediction resources in a processor and incurs very little hardware overhead. Modern processors have been trending towards provisioning more frontend resources, and this bodes well for FDP as it requires these resources to be effective. However, recent academic research has been using outdated and less than optimal frontend baselines that employ smaller structures, which may result in misleading outcomes. In this letter, we present a detailed FDP microarchitecture and evaluate two improvements, better branch history management and post-fetch correction. We believe that our FDP-based frontend design can serve as a new reference baseline for instruction prefetching research to bridge the gap between academia and industry.

中文翻译：

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Rebase 指令预取：行业视角

指令预取可以在提高具有大量指令占用空间和频繁且代价高昂的前端停顿的工作负载的性能方面发挥关键作用。特别是，Fetch Directed Prefetching (FDP) 是一种缓解前端停顿的有效技术，因为它利用了处理器中现有的分支预测资源并且只产生很少的硬件开销。现代处理器倾向于提供更多的前端资源，这对 FDP 来说是个好兆头，因为它需要这些资源才能有效。然而，最近的学术研究一直在使用采用较小结构的过时且不太理想的前端基线，这可能会导致误导性结果。在这封信中，我们展示了一个详细的 FDP 微架构，并评估了两项改进，更好的分支历史管理和后取更正。