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Low-Mismatch and Low-Loss Transformer-Based SPDT Switch with Switching Load Technique for 5G Applications
Journal of Circuits, Systems and Computers ( IF 0.9 ) Pub Date : 2020-12-10 , DOI: 10.1142/s0218126621501474
Xing Quan 1, 2 , Jinsong Zhan 1 , Jiang Luo 3 , Guodong Su 4 , Xiang Wang 4
Affiliation  

This paper proposes a switching load technique to improve the mismatch at outputs of the transformer-based single pole double throw (SPDT) switch, thus improving the insertion loss (IL) performance. A switch is introduced as the load of the primary inductor of the conventional transformer-based SPDT switch to improve the IL performance in transmission and receiving operation modes. A transformer-based SPDT switch is implemented with the switching load technique in TSMC 40nm CMOS technology. The transformer which has a symmetrical shape is implemented with the thick metal for low IL propose. The simulated results show that the proposed SPDT switch achieves a minimum insertion loss of 1.64dB and the IL is better than 2.2dB across the range from 24 to 35GHz. The proposed SPDT switch occupies a core area of 140×225μm2 and the return losses are better than 11dB at 24–35GHz.

中文翻译:

具有开关负载技术的低失配和低损耗基于变压器的 SPDT 开关,适用于 5G 应用

本文提出了一种开关负载技术来改善基于变压器的单刀双掷 (SPDT) 开关的输出失配,从而提高插入损耗 (IL) 性能。引入开关作为传统基于变压器的 SPDT 开关的初级电感负载,以提高发射和接收操作模式下的 IL 性能。使用 TSMC 40 中的开关负载技术实现基于变压器的 SPDT 开关纳米 CMOS 技术。具有对称形状的变压器采用厚金属实现低IL建议。仿真结果表明,所提出的 SPDT 开关实现了 1.64 的最小插入损耗dB 和 IL 优于 2.2dB 范围从 24 到 35千兆赫。所提出的单刀双掷开关占据了一个核心区域140×225μm 2和回波损耗优于-11分贝在 24–35千兆赫。
更新日期:2020-12-10
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