Abstract Recently, Cu interconnect and low-k materials have been applied to reduce the interconnect resistive-capacitive delay issue. However, as the process node size is reduced to a few nanometers, high leakage currents appear through the dielectric under high electric fields. Therefore, issues of Cu diffusion at the interface between the dielectric and the capping layer have been reported. This study investigated interfacial adhesion energy change at the film level between dielectric (low-k, tetraethyl orthosilicate (TEOS)) and capping layer (SiCN, SiN) taking into account the correlation between interfacial adhesion energy and interconnect reliability. In the capping layer/low-k interface, when low-k is applied to the top layer, it shows high interfacial adhesion energy (> 34.31 ± 3.49 J/m2) due to the presence of an O-rich thin layer. But when low-k is applied to the bottom layer, due to the Si C bond, it shows low interfacial adhesion energy ( 32.54 ± 1.97 J/m2) regardless of the stacking order and CMP process. It clearly shows that low-k dielectrics will affect the deterioration of the interfacial adhesion energy and O-rich layer will greatly improve the interfacial adhesion energy in dielectric/capping layers.

中文翻译：

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铜互连覆盖层与电介质界面粘附能研究

摘要 最近，Cu 互连和低k 材料已被应用于减少互连电阻-电容延迟问题。然而，随着工艺节点尺寸减小到几纳米，在高电场下通过电介质出现高泄漏电流。因此，已经报道了电介质和覆盖层之间界面处的铜扩散问题。本研究考虑了界面粘附能与互连可靠性之间的相关性，研究了电介质（低 k、原硅酸四乙酯 (TEOS)）和覆盖层（SiCN、SiN）之间薄膜级别的界面粘附能变化。在覆盖层/低 k 界面中，当低 k 应用于顶层时，由于存在富氧薄层，它显示出高界面粘附能 (> 34.31 ± 3.49 J/m2)。但是，当低 k 应用于底层时，由于 SiC 键，无论堆叠顺序和 CMP 工艺如何，它都显示出低界面粘附能 (32.54 ± 1.97 J/m2)。它清楚地表明，低 k 电介质会影响界面粘附能的恶化，而富氧层将大大提高介电/覆盖层中的界面粘附能。