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Multiclock Constraint System Modelling and Verification for Ensuring Cooperative Autonomous Driving Safety
Journal of Advanced Transportation ( IF 2.3 ) Pub Date : 2020-12-07 , DOI: 10.1155/2020/8830752
Jinyong Wang 1 , Zhiqiu Huang 1 , Xiaowei Huang 2 , Yi Zhu 3 , Fei Wang 1
Affiliation  

CADS (cooperative autonomous driving systems) are software-intensive and safety-critical reactive systems and give great promise to our daily life, but system errors may not be identified in the design stage until the implement stage, and the cost to correct them will be more expensive later than the early stage. For designing trustworthy autonomous software systems, we have to deal with multiclock constraint models. SysML (System Modeling Language) meets increasing adoption in order to carry out system-level modelling and verification against abstract representations, but it suffers from semantic ambiguities in the design of safety-critical autonomous systems. The main objective is to investigate methods for coping with the design and analysis models simultaneously and to achieve semantic consistency based on mathematical foundations and formal model transformation. In this paper, we propose a method to combine the requirement modelling process with analysis process together for CADS safety and reliability guarantee. Firstly, we extend SysML metamodels and construct SysML profile for the CADS domain that could improve modelling correctness and enhance reusability. An instantiated CADS model has been designed by means of adopting a profile containing different key functional and nonfunctional attributes and behaviors. Secondly, we define formal syntax and semantic notations for modelling elements in the SysML state machine diagram and show transformation rules between the state machine diagram and the CCSL (Clock Constraint Specification Language) model. Semantic preservation is also proved using the bisimulation relation between them for rigorous mapping correctness. Thirdly, a cooperative autonomous overtaking driving case study on the highway scenario is used for illustration, and we use the tool TimeSquare to simulate CCSL specification execution traces at the system design stage.

中文翻译:

确保自动驾驶安全的多时钟约束系统建模与验证

CADS(协作式自动驾驶系统)是软件密集型和安全性至关重要的反应系统,对我们的日常生活有很大的希望,但在设计阶段可能要到实施阶段才能确定系统错误,而纠正这些错误的成本将是比早期要贵。为了设计可信赖的自治软件系统,我们必须处理多时钟约束模型。SysML(系统建模语言)为了实现针对抽象表示的系统级建模和验证而受到越来越多的采用,但是它在安全关键型自治系统的设计中存在语义上的歧义。主要目标是研究同时应对设计和分析模型的方法,并基于数学基础和形式模型转换来实现语义一致性。本文提出了一种将需求建模过程与分析过程相结合的方法,以保证CADS的安全性和可靠性。首先,我们扩展SysML元模型并为CADS域构造SysML概要文件,以提高建模的正确性并增强可重用性。已通过采用包含不同关键功能和非功能属性及行为的配置文件来设计实例化的CADS模型。其次,我们为SysML状态机图中的模型元素定义了形式化的语法和语义符号,并显示了状态机图与CCSL(时钟约束规范语言)模型之间的转换规则。还使用它们之间的双仿真关系证明了语义保留的严格映射正确性。第三,以高速公路场景的协作式超车驾驶案例研究为例,在系统设计阶段,我们使用工具TimeSquare来模拟CCSL规范执行轨迹。
更新日期:2020-12-07
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