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Toward lower-diameter large-scale HPC and data center networks with co-packaged optics
Journal of Optical Communications and Networking ( IF 5.0 ) Pub Date : 2020-12-01 , DOI: 10.1364/jocn.402676
Pavlos Maniotis , Laurent Schares , Benjamin Lee , Marc Taubenblatt , Daniel Kuchta

We investigate the advantages of using co-packaged optics for building low-diameter, large-scale high-performance computing (HPC) and data center networks. The increased escape bandwidth offered by co-packaged optics can enable high-radix switch implementations of more than 150 switch ports, which can be combined with data rates of up to 400 Gb/s per port. From the network architecture perspective, the key benefits of using co-packaged optics in future fat-tree networks include (a) the ability to implement large-scale topologies of ${\gt}{11}{,}{000}$>11,000 end points by eliminating the need for a third switching layer and (b) the ability to provide up to ${4\times}$4× higher bisection bandwidth compared to existing solutions, reducing at the same time the number of required switch application-specific integrated circuits by ${\gt}{80}\%$>80%. From the network operation perspective, both reduced energy consumption and lower packet delays can be achieved since fewer hops are required; i.e., packets need to traverse fewer serializer/deserializer lanes and fewer switch buffers, which reduces the probability of contending with other packets and improves the tolerance of network congestion. The performance of the proposed architecture is evaluated via discrete-event simulations for a wide range of representative HPC synthetic-traffic cases that include both hotspot and non-hotspot scenarios. The simulation results suggest that co-packaged optics form a promising solution to keep up with bandwidth scaling in future networks, while the reduced number of switching layers can lead to significant mean packet delay improvements that start from 30% and reach up to 74% for high-load conditions.

中文翻译:

借助共封装的光学器件,朝着小直径的大规模高性能计算和数据中心网络发展

我们研究了使用共封装光学元件来构建小直径,大规模高性能计算(HPC)和数据中心网络的优势。共同封装的光学器件提供的增加的逃逸带宽可以实现150个以上交换机端口的高基数交换机实施,并且可以结合每个端口高达400 Gb / s的数据速率。从网络体系结构的角度来看,在未来的胖树网络中使用共封装的光学器件的主要好处包括:(a)实现$ {\ gt} {11} {,} {000} $>的大规模拓扑的能力通过消除对第三层交换的需要,达到了11,000个端点;(b)与现有解决方案相比,提供高达$ {4 \倍} $ 4×的对分带宽的能力,同时减少了所需的交换应用数量-特定集成电路,按$ {\ gt} {80} \%$> 80%。从网络操作的角度来看,由于需要更少的跃点,因此既可以减少能耗,又可以降低分组延迟。即,数据包需要遍历更少的串行器/解串器通道和更少的交换缓冲区,这降低了与其他数据包竞争的可能性,并提高了网络拥塞的容忍度。通过离散事件仿真,针对包括热点和非热点场景在内的各种代表性HPC综合流量案例,评估了所提出体系结构的性能。仿真结果表明,共封装的光学器件是一种有前途的解决方案,可以跟上未来网络中的带宽扩展需求,而交换层数量的减少可导致显着的平均数据包延迟改善,从30%到74%为止。高负载条件。
更新日期:2020-12-04
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