Abstract BiFeO3 (BFO) and ZrO2 have been deposited on p-type (100) silicon substrate by sol-gel process and rf sputtering method, respectively. Metal-ferroelectric-insulator-semiconductor capacitor has been fabricated with 100 nm BFO and 10 nm ZrO2 shows maximum memory window of 1.54 V as compared to other fabricated capacitors with 5 and 15 nm insulating layer thickness. Improvement in current density has been also observed in different thickness of buffer layer of MFIS capacitors. The improved current density of order of 10-7 A/cm2 has been observed in MF(100nm)I(10nm)S structure. It has been also observed in MF(100nm)I(10nm)S structure that no charge value degrades up to 1011 iteration cycles.

中文翻译：

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绝缘层厚度对用于非易失性存储器应用的 Al/BiFeO3/ZrO2/p-Si 电性能的影响

摘要 BiFeO3 (BFO) 和ZrO2 分别通过溶胶-凝胶工艺和射频溅射法沉积在p 型(100) 硅衬底上。金属-铁电-绝缘体-半导体电容器采用 100 nm BFO 和 10 nm ZrO2 制造，与具有 5 和 15 nm 绝缘层厚度的其他制造电容器相比，其最大存储窗口为 1.54 V。在不同厚度的 MFIS 电容器缓冲层中也观察到电流密度的改善。在 MF(100nm)I(10nm)S 结构中观察到 10-7 A/cm2 数量级的改进电流密度。在 MF(100nm)I(10nm)S 结构中也观察到，直到 1011 次迭代循环，电荷值都没有降低。