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Integration of hafnium oxide on epitaxial SiGe for p-type ferroelectric FET application
IEEE Electron Device Letters ( IF 4.1 ) Pub Date : 2020-12-01 , DOI: 10.1109/led.2020.3031308
Maximilian Lederer 1 , Franz Muller 1 , Kati Kuhnel 1 , Ricardo Olivo 1 , Konstantin Mertens 1 , Martin Trentzsch 2 , Stefan Dunkel 2 , Johannes Muller 2 , Sven Beyer 2 , Konrad Seidel 1 , Thomas Kampfe 1 , Lukas M. Eng 3
Affiliation  

Increasing demands for new computer architectures may require embedded non-volatile memories as for example in-memory computing. Ferroelectric field-effect transistors (FeFETs) add further advantages besides their outstanding properties due to the availability of both n-type and p-type transistors. The latter favor a different channel materials, like SiGe, due to the low hole mobility in silicon. In this article, we demonstrate the integration of ferroelectric hafnium oxide on SiGe as well as working p-type FeFETs, possessing a large memory window of about 1.1 V and low variability. Such architectures were co-integrated into a standard high-k metal gate (HKMG) CMOS platform. Furthermore, we report on the impact of annealing temperature on the interface and ferroelectric layer, which appears to be universal for SiGe and Si substrates. Here, a growth of the interface layer during annealing at higher temperatures was observed as well as a reduction of the wake-up effect for the ferroelectric layer.

中文翻译:

用于 p 型铁电 FET 应用的氧化铪在外延 SiGe 上的集成

对新计算机体系结构日益增长的需求可能需要嵌入式非易失性存储器,例如内存计算。由于 n 型和 p 型晶体管的可用性,铁电场效应晶体管 (FeFET) 除了具有出色的性能外,还增加了更多优势。由于硅中的低空穴迁移率,后者倾向于使用不同的沟道材料,如 SiGe。在本文中,我们展示了铁电氧化铪在 SiGe 上的集成以及工作的 p 型 FeFET,具有约 1.1 V 的大存储窗口和低可变性。这种架构被共同集成到标准的高 k 金属栅极 (HKMG) CMOS 平台中。此外,我们报告了退火温度对界面和铁电层的影响,这对于 SiGe 和 Si 衬底似乎是普遍的。这里,
更新日期:2020-12-01
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