Near-term applications of quantum information processors will rely on optimized circuit implementations to minimize the circuit depth, reducing the negative impact of gate errors in noisy intermediate-scale quantum (NISQ) computers. One approach to minimize the circuit depth is the use of a more expressive gate set. The XY two-qubit gate set can offer reductions in circuit depth for generic circuits, as well as improved performance for problems with symmetries that match the gate set. Here we report an implementation of the family of XY entangling gates in a transmon-based superconducting qubit architecture using a gate decomposition strategy that requires only a single calibrated pulse. The approach allows us to implement XY gates with a median fidelity of 97.35 ± 0.17%, approaching the coherence-limited gate fidelity of the two-qubit pair. We also show that the XY gate can be used to implement instances of the quantum approximate optimization algorithm, achieving a reduction in circuit depth of ~30% compared with the use of CZ gates only. Finally, we extend our decomposition scheme to other gate families, which can allow for further reductions in circuit depth.

量子信息处理器的近期应用将依赖于优化的电路实现方式，以最大程度地减小电路深度，从而减少嘈杂的中型量子（NISQ）计算机中门误差的负面影响。最小化电路深度的一种方法是使用更具表现力的门集。XY两量子位门控装置可以减少通用电路的电路深度，并且可以改善与门控装置匹配的对称性问题的性能。在这里，我们报告了基于门的超导量子位架构中的XY纠缠门系列的实现，该门使用仅需单个校准脉冲的门分解策略。该方法使我们能够实现中位保真度为97.35±0.17％的XY门，接近两个量子位对的相干极限门保真度。我们还表明，XY门可用于实现量子近似优化算法的实例，与仅使用CZ门相比，可将电路深度减少约30％。最后，我们将分解方案扩展到其他门系列，从而可以进一步减小电路深度。