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Novel 4:2 Approximate Compressor Designs for Multimedia and Neural Network Applications
Journal of Circuits, Systems and Computers ( IF 0.9 ) Pub Date : 2020-11-20 , DOI: 10.1142/s0218126621501383
Pranose J. Edavoor 1 , Sithara Raveendran 2 , Amol D. Rahulkar 1
Affiliation  

Low power dissipation in approximate arithmetic circuits has laid the foundation for area-efficient computational units for error resilient applications like image and signal processing. This paper proposes two novel low power high speed architectures for approximate 4:2 compressor that can be employed in multipliers for partial product summation. The two designs presented (Design1 and Design2) have Error Distance (ED) of ±1 and Error Rate (ER) of 25%. The proposed Design1 and Design2 are able to achieve reduction in power and delay by (62.50%, 47.67%) and (83.13%, 60.20%), respectively, in comparison with the exact 4:2 compressor. To verify the effectiveness of the design, the proposed architectures are used to implement 8×8 Dadda multiplier. The equal number of errors in positive and negative directions in the proposed designs aid in reducing the Mean Error Distance (MED) and Mean Relative Error Distance (MRED) of the multiplier. Multiplication of images and two-level decomposition of 2D Haar wavelets are implemented using the designed Dadda multiplier. The efficiency of the image processing applications is measured in terms of Mean Structural Similarity (MSSIM) index and Peak Signal-to-Noise Ratio (PSNR) and an average of 0.98 and 35dB, respectively, is obtained, which are in the acceptable range. In addition, a Convolutional Neural Network (CNN)-based LeNet-1 Handwritten Digit Recognition System (HDRS) is implemented using the proposed compressor-based multipliers. The proposed compressor-based architectures are able to achieve an average accuracy of 96.23%.

中文翻译:

用于多媒体和神经网络应用的新型 4:2 近似压缩器设计

近似算术电路的低功耗为图像和信号处理等容错应用的面积高效计算单元奠定了基础。本文提出了两种用于近似 4:2 压缩机的新型低功率高速架构,可用于乘法器进行部分乘积求和。提出的两种设计(设计-1设计-2) 的误差距离 (ED) 为±1错误率 (ER) 为 25%。提议的设计-1设计-2与精确的 4:2 压缩机相比,能够分别减少(62.50%、47.67%)和(83.13%、60.20%)的功率和延迟。为了验证设计的有效性,提出的架构用于实现8×8达达乘数。在所提议的设计中,正负方向上相同数量的误差有助于减小乘法器的平均误差距离 (MED) 和平均相对误差距离 (MRED)。使用设计的 Dadda 乘法器实现图像的乘法和 2D Haar 小波的两级分解。图像处理应用的效率是根据平均结构相似度 (MSSIM) 指数和峰值信噪比 (PSNR) 来衡量的,平均值为 0.98 和 35分别得到dB,在可接受的范围内。此外,使用所提出的基于压缩器的乘法器实现了基于卷积神经网络 (CNN) 的 LeNet-1 手写数字识别系统 (HDRS)。所提出的基于压缩器的架构能够达到 96.23% 的平均准确率。
更新日期:2020-11-20
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