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Approximate Logic Synthesis: A Survey
Proceedings of the IEEE ( IF 23.2 ) Pub Date : 2020-12-01 , DOI: 10.1109/jproc.2020.3014430
Ilaria Scarabottolo , Giovanni Ansaloni , George A. Constantinides , Laura Pozzi , Sherief Reda

Approximate computing is an emerging paradigm that, by relaxing the requirement for full accuracy, offers benefits in terms of design area and power consumption. This paradigm is particularly attractive in applications where the underlying computation has inherent resilience to small errors. Such applications are abundant in many domains, including machine learning, computer vision, and signal processing. In circuit design, a major challenge is the capability to synthesize the approximate circuits automatically without manually relying on the expertise of designers. In this work, we review methods devised to synthesize approximate circuits, given their exact functionality and an approximability threshold. We summarize strategies for evaluating the error that circuit simplification can induce on the output, which guides synthesis techniques in choosing the circuit transformations that lead to the largest benefit for a given amount of induced error. We then review circuit simplification methods that operate at the gate or Boolean level, including those that leverage classical Boolean synthesis techniques to realize the approximations. We also summarize strategies that take high-level descriptions, such as C or behavioral Verilog, and synthesize approximate circuits from these descriptions.

中文翻译:

近似逻辑综合:调查

近似计算是一种新兴范式,通过放宽对全精度的要求,在设计面积和功耗方面提供优势。这种范式在底层计算对小错误具有固有弹性的应用程序中特别有吸引力。此类应用在许多领域都很丰富,包括机器学习、计算机视觉和信号处理。在电路设计中,一个主要挑战是能够自动合成近似电路,而无需手动依赖设计人员的专业知识。在这项工作中,我们回顾了设计用于合成近似电路的方法,考虑到它们的确切功能和近似性阈值。我们总结了评估电路简化可能对输出造成的误差的策略,它指导综合技术选择对给定的感应误差产生最大收益的电路转换。然后,我们回顾了在门级或布尔级操作的电路简化方法,包括那些利用经典布尔综合技术来实现近似的方法。我们还总结了采用高级描述的策略,例如 C 或行为 Verilog,并从这些描述中合成近似电路。
更新日期:2020-12-01
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