当前位置: X-MOL 学术Integration › 论文详情
Our official English website, www.x-mol.net, welcomes your feedback! (Note: you will need to create a separate account there.)
High speed VLSI architecture for improved region based active contour segmentation technique
Integration ( IF 2.2 ) Pub Date : 2020-11-13 , DOI: 10.1016/j.vlsi.2020.11.004
Radhika V. Menon , Shantharam Kalipatnapu , Indrajit Chakrabarti

Active contour segmentation is an important stage in image analysis applications. In this article, an improved region based active contour segmentation is proposed. The proposed active contour model speeds up the contour convergence by up to 40% while maintaining the advantages of a local region based active contour model by reducing the number of iterations. Moreover, we propose a low-complexity pipelined VLSI architecture for improved region based active contour model targeting FPGA and 90 nm ASIC platforms. The proposed pipelined design offers an increased speed of operation. Its complexity is independent of the size of image.



中文翻译:

高速VLSI架构,用于改进基于区域的主动轮廓分割技术

主动轮廓分割是图像分析应用程序中的重要阶段。在本文中,提出了一种改进的基于区域的主动轮廓分割方法。提出的主动轮廓模型将轮廓收敛速度提高了40 %,同时通过减少迭代次数保持了基于局部区域的主动轮廓模型的优势。此外,我们针对面向FPGA和90 nm ASIC平台的基于区域的有源轮廓模型提出了一种低复杂度的流水线VLSI架构。拟议的流水线设计可提高运行速度。它的复杂性与图像的大小无关。

更新日期:2020-11-27
down
wechat
bug