Phase/frequency detectors (PFDs), equipped with blind zone (BZ) relieving delay elements (DEs), are studied. DE design guidelines for oscillation-free optimal PFD I/O characteristics, along with detailed validation, are presented. This PFD study is useful for the design of charge-pumped phase-locked loops (CP-PLLs) that employ high-frequency input clocks.

中文翻译：

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高频相位/频率检测器：无振荡最佳 I/O 分析

研究了配备盲区 (BZ) 延迟元件 (DE) 的相位/频率检测器 (PFD)。介绍了无振荡最佳 PFD I/O 特性的 DE 设计指南，以及详细的验证。该 PFD 研究对于采用高频输入时钟的电荷泵浦锁相环 (CP-PLL) 的设计非常有用。