A study of amplitude‐to‐phase noise conversion in planar oscillators,International Journal of Circuit Theory and Applications

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A study of amplitude‐to‐phase noise conversion in planar oscillators
International Journal of Circuit Theory and Applications ( IF 1.8 ) Pub Date : 2020-11-09 , DOI: 10.1002/cta.2893
Torsten Djurhuus ₁ , Viktor Krozer ₁

Affiliation

This paper explores the many interesting implications for oscillator design, with optimized phase‐noise performance, deriving from a newly proposed model based on the concept of oscillator conjugacy. For the case of 2‐D (planar) oscillators, the model prominently predicts that only circuits producing a perfectly symmetric steady‐state can have zero amplitude‐to‐phase (AM‐PM) noise conversion, a so‐called zero‐state. Simulations on standard industry oscillator circuits verify all model predictions and, however, also show that these circuit classes cannot attain zero‐states except in special limit‐cases which are not practically relevant. Guided by the newly acquired design rules, we describe the synthesis of a novel 2‐D reduced‐order LC oscillator circuit which achieves several zero‐states while operating at realistic output power levels. The potential future application of this developed theoretical framework for implementation of numerical algorithms aimed at optimizing oscillator phase‐noise performance is briefly discussed.

中文翻译：

平面振荡器中幅相噪声转换的研究

本文探索了振荡器设计的许多有趣含义，它们具有优化的相位噪声性能，它源于一个新提出的基于振荡器共轭概念的模型。对于二维（平面）振荡器，该模型突出地预测，只有产生完全对称稳态的电路才可以具有零振幅相位（AM-PM）噪声转换，即所谓的零状态。在标准工业振荡器电路上的仿真验证了所有模型的预测，但是，也表明，这些电路类别无法达到零状态，除非在特殊的极限情况下（这在实际中不相关）。在新获得的设计规则的指导下，我们描述了一种新颖的二维降阶LC振荡器电路的合成，该电路在达到实际输出功率水平时可以实现多个零态。

更新日期：2021-01-16

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