Granular power management in a power-efficient system on a chip (SoC) requires multiple integrated voltage regulators with a small area, process scalability, and low supply voltage. Conventional on-chip analog low-dropout regulators (ALDOs) can hardly meet these requirements, while digital LDOs (DLDOs) are good alternatives. However, the conventional DLDO, with synchronous control, has inherently slow transient response limited by the power-speed trade-off. Meanwhile, it has a poor power supply rejection (PSR), because the fully turned-on power switches in DLDO are vulnerable to power supply ripples. In this comparative study on DLDOs, first, we compare the pros and cons between ALDO and DLDO in general. Then, we summarize the recent DLDO advanced techniques for fast transient response and PSR enhancement. Finally, we discuss the design trends and possible directions of DLDO.

中文翻译：

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数字低压差稳压器的比较研究

高能效片上系统 (SoC) 中的精细电源管理需要多个具有小面积、工艺可扩展性和低电源电压的集成稳压器。传统的片上模拟低压降稳压器 (ALDO) 很难满足这些要求，而数字 LDO (DLDO) 是不错的选择。然而，具有同步控制的传统 DLDO 具有固有的缓慢瞬态响应，受限于功率-速度权衡。同时，它具有较差的电源抑制（PSR），因为 DLDO 中完全开启的电源开关容易受到电源纹波的影响。在这项关于 DLDO 的比较研究中，我们首先比较了 ALDO 和 DLDO 之间的优缺点。然后，我们总结了最近用于快速瞬态响应和 PSR 增强的 DLDO 高级技术。最后，