Fast Fourier transform (FFT) is utilised to minimise the complexity of discrete Fourier transform by converting signals from frequency domain to time domain and conversely. Digital signal processing systems like image processing, general filtering, sonar, spread-spectrum communications and convolutions use this FFT operations. Radix-2 decimation in frequency (R2DIF) method is designed to execute an efficient FFT architecture in this study. Each and every state of the FFT stores the input and output the data using the R2DIF method. Also, the complex twiddle factors in FFT are replaced by the proposed uniform Montgomery algorithm. This technique simply performs the shift-add method instead of the multiplication process which also enhances the convergence of the calculation. So, the FFT implementation is done with the help of the proposed method which reduces the usage of chips in the process. Based on this approach, it performs the operation of FFT from 16 points to 1024 points and the performance of this proposed method is compared with existing approaches. Moreover, it does not require expensive dedicated functional blocks and uses only distributed logic resources. The simulation is carried out by the Xilinx platform using Verilog coding. The proposed design outperforms conventional methods in terms of less usage power and high speed.

中文翻译：

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现场可编程门阵列上无乘数并行流水线FFT的设计优化

快速傅里叶变换（FFT）用于通过将信号从频域转换到时域来进行反傅里叶变换，从而最小化离散傅里叶变换的复杂性。诸如图像处理，通用滤波，声纳，扩频通信和卷积之类的数字信号处理系统都使用此FFT操作。在本研究中，基数2频率抽取（R2DIF）方法旨在执行高效的FFT架构。FFT的每个状态都使用R2DIF方法存储输入和输出数据。同样，FFT中的复杂旋转因子被提出的统一蒙哥马利算法所取代。该技术仅执行移位加法而不是乘法处理，这也增强了计算的收敛性。所以，FFT的实现是借助所提出的方法来完成的，该方法减少了过程中芯片的使用。基于这种方法，它执行了从16点到1024点的FFT运算，并将该方法的性能与现有方法进行了比较。此外，它不需要昂贵的专用功能块，而仅使用分布式逻辑资源。Xilinx平台使用Verilog编码进行了仿真。拟议的设计在使用功率少，速度快方面优于传统方法。它不需要昂贵的专用功能块，而仅使用分布式逻辑资源。Xilinx平台使用Verilog编码进行了仿真。拟议的设计在使用功率少，速度快方面优于传统方法。它不需要昂贵的专用功能块，而仅使用分布式逻辑资源。Xilinx平台使用Verilog编码进行了仿真。拟议的设计在使用功率少，速度快方面优于传统方法。