In this Letter, a 1.2 kV SiC power MOSFET with a partially widened retrograde P-well (RP) structure and N -implanting region is proposed to enhance the device's reliability. Compared with the conventional SiC power MOSFET, the short circuit (SC) ability of the proposed structure can be improved effectively without sacrificing other performance. Simulation results reveal that a 40% reduction of the SC saturation current can be achieved, resulting in the SC withstand time increase from 7 to 10 μs at the DC-link voltage 800 V. Moreover, a better gate oxide reliability at 1.2 kV blocking condition also can be achieved. The peak electric field at the gate oxide interface is decreased by ∼48% owing to the shielding effect of the RP structure. In addition, the fabrication technology of the proposed structure is compatible with the standard planar SiC MOSFET manufacture process only with a few additional implanting steps. Therefore, this new MOSFET structure provides a simple and effective way to optimise the reliability of the planar SiC power MOSFET.

中文翻译：

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可靠性增强的SiC MOSFET，具有部分加宽的逆向P阱结构

在这封信中，一个1.2 kV SiC功率MOSFET具有部分加宽的反向P阱（RP）结构，并且 ñ 提出了植入区域以提高器件的可靠性。与传统的SiC功率MOSFET相比，该结构的短路（SC）能力可以有效提高，而不会牺牲其他性能。仿真结果表明，可以将SC饱和电流降低40％，从而在直流母线电压为800 V时，SC的承受时间从7 s增加到10μs。此外，在1.2 kV的阻断条件下，栅极氧化物的可靠性更高也可以实现。由于RP结构的屏蔽作用，栅极氧化物界面的峰值电场降低了约48％。此外，所提出的结构的制造技术仅需几个额外的注入步骤即可与标准的平面SiC MOSFET制造工艺兼容。因此，