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Automatic identification and hardware implementation of a resource-constrained power model for embedded systems
Sustainable Computing: Informatics and Systems ( IF 3.8 ) Pub Date : 2020-11-02 , DOI: 10.1016/j.suscom.2020.100467
Luca Cremona , William Fornaciari , Davide Zoni

In modern embedded systems, the use of hardware-level online power monitors is crucial to support the run-time power optimizations required to meet the ever increasing demand for energy efficiency. To be effective and to deal with the time-to-market pressure, the presence of such requirements must be considered even during the design of the power monitoring infrastructure. This paper presents a power model identification and implementation strategy with two main advantages over the state-of-the-art. First, our solution trades the accuracy of the power model with the amount of resources allocated to the power monitoring infrastructure. Second, the use of an automatic power model instrumentation strategy ensures a timely implementation of the power monitor regardless the complexity of the target computing platforms. Our methodology has been validated against 8 accelerators generated through a High-Level-Synthesis flow and by considering a more complex RISC-V embedded computing platform. Depending on the imposed user-defined constraints and with respect to the unconstrained power monitoring state-of-the-art solutions, our methodology shows a resource saving between 37.3% and 81% while the maximum average accuracy loss stays within 5%, i.e., using the aggressive 20us temporal resolution. However, by varying the temporal resolution closer to the value proposed in the state of the art, i.e. in the range of hundreds of microseconds, the average accuracy loss of our power monitors is lower than 1% with almost the same overheads. In addition, our solution demonstrated the possibility of delivering a resource constrained power monitor employing a 20us temporal resolution, i.e., far higher the one used by current state-of-the-art solutions.



中文翻译:

嵌入式系统的资源受限功率模型的自动识别和硬件实现

在现代嵌入式系统中,硬件级在线电源监控器的使用对于支持满足不断增长的能效需求所需的运行时电源优化至关重要。为了有效并应对上市时间的压力,即使在电源监控基础架构的设计过程中,也必须考虑此类要求的存在。本文提出了一种功率模型识别和实施策略,与现有技术相比,它具有两个主要优势。首先,我们的解决方案将电源模型的准确性与分配给电源监控基础架构的资源量进行权衡。其次,不管目标计算平台的复杂性如何,使用自动功率模型检测策略都可以确保及时实施功率监控器。我们的方法论已针对通过高级综合流程生成的8个加速器进行了验证,并考虑了更复杂的RISC-V嵌入式计算平台。根据施加的用户定义的约束条件以及相对不受约束的功率监控最新解决方案,我们的方法显示出37.3%到81%的资源节省,而最大平均精度损失保持在5%以内,即使用积极的20us时间分辨率。但是,通过将时间分辨率更改为更接近现有技术中建议的值,即在数百微秒的范围内,我们的功率监控器的平均精度损失低于1%,开销几乎相同。此外,

更新日期:2020-11-02
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