As the primary second-order effect, parasitic issues have to be seriously addressed when synthesizing high-performance analog and RF integrated circuits (ICs). In this article, a two-phase hybrid sizing methodology for analog and RF ICs is proposed to take into account parasitic effect in the early design stage. It involves symbolic modeling and mixed-integer nonlinear programming (MINLP) in the first phase, and a many-objective evolutionary algorithm (many-OEA)-based sizing refiner in the second phase. With the aid of our proposed current density factor and piecewise curve fitting technique, the g m / I D concept, which is typically utilized to solve the analog circuit design problem, can provide theoretical support to our accurate symbolic modeling. Thus, the intrinsic and interconnect parasitics can be accurately considered in our work with moderate modeling effort. A variety of electrical, geometric, and parasitic (including parasitic mismatch) constraints can be conveniently integrated into our MINLP problem formulation. Moreover, numerical simulations are embedded into the many-OEA-based sizing phase, which is able to tackle floorplan co-optimization. With such dynamic floorplan variation, the parasitics accuracy can be sustained along the evolution. The experimental results demonstrate high efficacy of our proposed parasitic-aware hybrid sizing methodology.

中文翻译：

---

用于模拟和射频集成电路的高效寄生感知 gm/ID 基于混合大小调整方法

作为主要的二阶效应，在合成高性能模拟和射频集成电路 (IC) 时，必须认真解决寄生问题。在本文中，提出了一种用于模拟和射频 IC 的两相混合尺寸调整方法，以在早期设计阶段考虑寄生效应。它在第一阶段涉及符号建模和混合整数非线性规划 (MINLP)，在第二阶段涉及基于多目标进化算法 (many-OEA) 的尺寸细化器。借助我们提出的电流密度因子和分段曲线拟合技术，G米 /一世D 通常用于解决模拟电路设计问题的概念可以为我们准确的符号建模提供理论支持。因此，在我们的工作中可以通过适度的建模工作准确地考虑内在和互连寄生效应。各种电气、几何和寄生（包括寄生失配）约束可以方便地集成到我们的 MINLP 问题公式中。此外，数值模拟嵌入到基于多 OEA 的尺寸调整阶段，能够解决平面图协同优化问题。有了这样的动态平面图变化，寄生精度可以随着演进而保持。实验结果证明了我们提出的寄生感知混合尺寸方法的高效性。