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Information Storage Bit-Flipping Decoder for LDPC Codes
IEEE Transactions on Very Large Scale Integration (VLSI) Systems ( IF 2.8 ) Pub Date : 2020-11-01 , DOI: 10.1109/tvlsi.2020.3009270
Hangxuan Cui , Jun Lin , Zhongfeng Wang

Tabu-list random-penalty gradient descent bit-flipping (TRGDBF) decoder is the state-of-the-art hard-decision low-density parity-check (LDPC) decoder in terms of error-correction performance on binary symmetric channel (BSC). However, the TRGDBF decoder suffers from a long critical path caused by the global maximum-finding operation, limiting the achievable throughput. This brief proposes an information storage bit-flipping (ISBF) decoder to solve this problem. Different from the existing bit-flipping (BF) decoders which adopt serial decoding manner, in the ISBF decoder, by storing the previous decoding information, the global maximum-finding operation can be executed in parallel to other decoding operations, significantly shortening the critical path. Moreover, a nonuniform flipping rule is incorporated to achieve a better decoding performance. We also present an efficient architecture to implement the ISBF decoder. The design example demonstrates that compared to other hard-decision BF decoders, the ISBF decoder could provide both the best decoding performance and throughput on BSC.

中文翻译:

用于 LDPC 码的信息存储位翻转解码器

就二进制对称信道 (BSC) 上的纠错性能而言,禁忌列表随机惩罚梯度下降比特翻转 (TRGDBF) 解码器是最先进的硬判决低密度奇偶校验 (LDPC) 解码器)。然而,TRGDBF 解码器受到全局最大查找操作导致的长关键路径的影响,限制了可实现的吞吐量。本文提出了一种信息存储位翻转 (ISBF) 解码器来解决这个问题。与现有的比特翻转(BF)解码器采用串行解码方式不同,ISBF解码器通过存储先前的解码信息,可以与其他解码操作并行执行全局最大值查找操作,显着缩短了关键路径. 此外,还引入了非均匀翻转规则以实现更好的解码性能。我们还提出了一种有效的架构来实现 ISBF 解码器。该设计示例表明,与其他硬判决 BF 解码器相比,ISBF 解码器可以在 BSC 上提供最佳的解码性能和吞吐量。
更新日期:2020-11-01
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