In this article, a voltage coupling enhancement (VCE) technique is developed to suppress the transient gate overvoltage of an insulated gate trigger thyristor (IGTT) in ultrahigh di/dt pulse applications. It is found that, due to the gate-cathode voltage (VG-VC) coupling associated with the intrinsic gate-cathode capacitor (Cgc) and inevitable common source inductance (LC) of IGTT, the gate voltage (VG) would oscillate with the cathode voltage VC (= LC × di/dt), which produces high gate-cathode voltage (VGC) oscillation. This easily leads to device failure especially at high di/dt pulse condition. Enhanced VG - VC coupling by increasing intrinsic Cgc can contribute to the close following of VG against VC, suppressing the transient gate overvoltage. Thus, a modified dummy gate IGTT (DG-IGTT) structure with increased Cgc is specially designed as a practical implementation of the VCE technique. Experimental results show that the DG-IGTT has a low gate overvoltage (VGC-max) of 31.2 V, whereas the VGC-max of conventional IGTT is over 136.7 V. In addition, the DG-IGTT in Kelvin source package can further achieve a much lower VGC-max of 18.5 V at ultrahigh di/dt of 32.4 kA/μs. The DG-IGTT successfully works at the repetition rate of 200 Hz, indicating the proposed VCE technique is promising for improving device robustness in ultrahigh di/dt and repetitive pulse applications.

中文翻译：

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电压耦合增强，用于超高 di/dt 脉冲应用中绝缘栅触发晶闸管的瞬态栅过压抑制


在本文中，开发了一种电压耦合增强 (VCE) 技术，用于抑制超高 di/dt 脉冲应用中绝缘栅触发晶闸管 (IGTT) 的瞬态栅极过电压。研究发现，由于与固有栅阴极电容（Cgc）和IGTT不可避免的共源电感（LC）相关的栅阴极电压（VG-VC）耦合，栅电压（VG）会随着阴极电压 VC (= LC × di/dt)，产生高栅阴极电压 (VGC) 振荡。这很容易导致器件故障，尤其是在高 di/dt 脉冲条件下。通过增加固有 Cgc 来增强 VG - VC 耦合有助于 VG 紧随 VC，从而抑制瞬态栅极过压。因此，专门设计了一种具有增加的Cgc的改进的伪栅极IGTT（DG-IGTT）结构作为VCE技术的实际实现。实验结果表明，DG-IGTT具有31.2 V的低栅极过压（VGC-max），而传统IGTT的VGC-max超过136.7 V。此外，采用开尔文源封装的DG-IGTT可以进一步实现在 32.4 kA/μs 的超高 di/dt 下，VGC-max 低得多，为 18.5 V。 DG-IGTT 成功地以 200 Hz 的重复率工作，表明所提出的 VCE 技术有望提高超高 di/dt 和重复脉冲应用中的器件鲁棒性。