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A 6.5-渭W 10-kHz BW 80.4-dB SNDR Gm-C-Based CT 鈭嗏垜 Modulator With a Feedback-Assisted Gm Linearization for Artifact-Tolerant Neural Recording
IEEE Journal of Solid-State Circuits ( IF 4.6 ) Pub Date : 2020-09-03 , DOI: 10.1109/jssc.2020.3018478
Changuk Lee , Taejune Jeon , Moonhyung Jang , Sanggeon Park , Jejung Kim , Jeongsik Lim , Jong-Hyun Ahn , Yeowool Huh , Youngcheol Chae

This article presents a Gm-C-based continuous-time delta–sigma modulator (CTDSM) for artifact-tolerant neural recording interfaces. We propose the feedback-assisted Gm linearization technique, which is applied to the first Gm-C integrator by using a resistive feedback digital-to-analog converter (DAC) in parallel to the degeneration resistor of the input Gm. This enables the input Gm to process the quantization noise, thereby improving the input range and linearity of the Gm-C-based CTDSM, significantly. An energy-efficient second-order loop filter is realized by using a voltage-controlled oscillator (VCO) as the second integrator and a phase quantizer. A proportional–integral (PI) transfer function is employed at the first integrator, which minimizes the output swing while maintaining loop stability. Fabricated in a 110-nm CMOS process, the prototype CTDSM achieves a high input impedance, 300-mVpp linear input range, 80.4-dB signal-to-noise and distortion ratio (SNDR), 81-dB dynamic range (DR), and 76-dB common-mode rejection ratio (CMRR) and consumes only 6.5 μW\mu \text{W} with a signal bandwidth of 10 kHz. This corresponds to a figure of merit (FoM) of 172.3 dB, which is the state of the art among the neural recording ADCs. This work is also validated through the in vivo experiment.

中文翻译:


具有反馈辅助 Gm 线性化功能的基于 Gm-C 的 6.5μW 10kHz 带宽 80.4dB SNDR CT 调制器,用于容伪神经记录



本文提出了一种基于 Gm-C 的连续时间 delta-sigma 调制器 (CTDSM),用于容错神经记录接口。我们提出了反馈辅助 Gm 线性化技术,该技术通过使用与输入 Gm 的负反馈电阻并联的电阻反馈数模转换器 (DAC) 应用于第一个 Gm-C 积分器。这使得输入 Gm 能够处理量化噪声,从而显着提高基于 Gm-C 的 CTDSM 的输入范围和线性度。通过使用压控振荡器(VCO)作为第二积分器和相位量化器来实现节能的二阶环路滤波器。第一个积分器采用比例积分 (PI) 传递函数,可最大限度地减少输出摆幅,同时保持环路稳定性。原型 CTDSM 采用 110 nm CMOS 工艺制造,可实现高输入阻抗、300 mVpp 线性输入范围、80.4 dB 信噪比和失真比 (SNDR)、81 dB 动态范围 (DR) 和共模抑制比 (CMRR) 为 76 dB,信号带宽为 10 kHz 时功耗仅为 6.5 μW\mu \text{W}。这对应于 172.3 dB 的品质因数 (FoM),这是神经记录 ADC 中最先进的水平。这项工作也通过体内实验得到了验证。
更新日期:2020-09-03
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