Device simulations of a novel nanopillar-based n-CdS/p-CdTe solar cell with back contacts are carried out using the SILVACO technology computer-aided design (TCAD) device simulator. The device consists of nanopillars of CdTe coated with a very thin layer of CdS. It is shown that, for nanopillars with increasing height but given width as well as increasing width and given height, device performance parameters such as the open-circuit voltage (V_oc), short-circuit current density (J_sc), fill factor, and solar cell conversion efficiency (η) increase. However, there is an optimum number of nanopillars that can be integrated into a given device area, while integration of more or fewer than this optimum value will deteriorate the device performance.

使用SILVACO技术的计算机辅助设计（TCAD）设备模拟器对具有背触点的新型基于纳米柱的n -CdS / p -CdTe太阳能电池进行了设备模拟。该设备由涂覆有非常薄的CdS层的CdTe纳米柱组成。结果表明，对于具有增加的高度但给定的宽度以及增加的宽度和给定的高度的纳米柱，器件性能参数，例如开路电压（V _oc），短路电流密度（J _sc），填充系数，和太阳能电池转换效率（η） 增加。但是，存在可以集成到给定设备区域中的最佳数量的纳米柱，而集成数量大于或小于此最佳值将使设备性能下降。